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HYI39SC128160FE Datasheet(PDF) 11 Page - Qimonda AG |
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HYI39SC128160FE Datasheet(HTML) 11 Page - Qimonda AG |
11 / 20 page Internet Data Sheet Rev. 1.1, 2007-02 11 09072006-N4GC-EREN HY[B/I]39SC128[800/160]FE 128-MBit Synchronous DRAM 4 Electrical Characteristics 4.1 Operating Conditions TABLE 7 Absolute Maximum Ratings Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values maycause irreversible damage to the integrated circuit. TABLE 8 DC Characteristics Parameter Symbol Limit Values Unit Note/ Test Condition Min. Max. Input / Output voltage relative to V SS V IN, VOUT –1.0 +4.6 V — Voltage on V DD supply relative to VSS V DD –1.0 +4.6 V — Voltage on V DDQ supply relative to VSS V DDQ –1.0 +4.6 V — Operating Temperature for HYB... T A 0+70 °C— Operating Temperature for HYI... T A –40 +85 °C— Storage temperature range T STG –55 +150 °C— Power dissipation per SDRAM component P D —1 W — Data out current (short circuit) I OUT —50 mA — Parameter Symbol Values Unit Note/ Test Condition Min. Max. Supply Voltage V DD 3.0 3.6 V 1) 1) All voltages are referenced to V SS I/O Supply Voltage V DDQ 3.0 3.6 V 1) Input high voltage V IH 2.0 V DDQ + 0.3 V 1)2) 2) V IH may overshoot to VDDQ + 2.0 V for pulse width of < 4ns with 3.3 V. VIL may undershoot to -2.0 V for pulse width < 4.0 ns with 3.3 V. Pulse width measured at 50 % points with amplitude measured peak to DC reference. Input low voltage V IL –0.3 +0.8 V 1)2) Output high voltage ( I OUT = – 4.0 mA) V OH 2.4 — V 1) Output low voltage ( I OUT = 4.0 mA) V OL —0.4 V 1) Input leakage current, any input (0 V < V IN < VDD, all other inputs = 0 V) I IL –5 +5 µA— Output leakage current (DQs are disabled, 0 V < V OUT < VDDQ) I OL –5 +5 µA— |
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