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MC145170D2 Datasheet(PDF) 6 Page - LANSDALE Semiconductor Inc. |
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MC145170D2 Datasheet(HTML) 6 Page - LANSDALE Semiconductor Inc. |
6 / 26 page LANSDALE Semiconductor, Inc. ML145170 www.lansdale.com Page 6 of 26 LOOP SPECIFICATION ( TA = –40° to 85°C) Figure VDD Guaranteed Range Parameter Test Condition Symbol No. V Min Max Unit Input Frequency, fin [Note] Vin ≥ 500 mVpp Sine Wave N Counter Set to Divide Ratio Such that f ≤ 2.0 MHz f 7 2.7 3.0 4.5 5.5 5.0 5.0 25 45 80 100 185 185 MHz Input Frequency, OSCin Externally Driven with AC–coupled Signal Vin ≥ 1.0 VPP Sine Wave OSCout = No Connect R Counter Set to Divide Ratio Such that fR ≤ 2 MHz f 8a 2.7 3.0 4.5 5.5 1.0* 1.0* 1.0* 1.0* 22 25 30 35 MHz Crystal Frequency, OSCin and OSCout C1 ≤ 30 pF C2 ≤ 30pF Includes Stray Capacitance fXTAL 9 2.7 3.0 4.5 5.5 2.0 2.0 2.0 2.0 12 12 15 15 MHz Output Frequency REFout CL = 30 pF fout 10, 12 2.7 4.5 5.5 DC DC DC – 10 10 MHz Operating Frequency of the Phase Detectors f 2.7 4.5 5.5 DC DC DC – 20 20 MHz Output Pulse Width, φR, φV, and LD fR in Phase with fV CL = 50 pF tw 11, 12 2.7 4.5 5.5 – 20 16 – 100 90 ns Output Transition Times, φR, φV, LD, fR, and fV CL = 50pF tTLH, t 11, 12 2.7 4.5 5.5 – – – – 65 60 ns in OSC f in Cin – – – – – – 7.0 7.0 pF * IF lower frequency is desired, use wave shaping or higher amplitude sinusoidal signal in AC–coupled case. Also, see Figure 22 for DC coupling THL Input Capacitance v Issue A |
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