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GL9711 Datasheet(PDF) 18 Page - GENESYS LOGIC |
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GL9711 Datasheet(HTML) 18 Page - GENESYS LOGIC |
18 / 42 page GL9711 PCI Express TM PIPE x1 PHY ©2000-2006 Genesys Logic Inc. - All rights reserved. Page 18 M2, M4, N1, N3, N4, P2, P3, P4, P5, P6, P7, P8, P12, R1, R2, R3, R4, R5, R6, R8, R14, T1, T3, T4, T7, T8, T9, T13, U2, U4, U6, U7, U8, U15 Note: ”NC” pins should be left open on circuit board. Table 3.5 - Parameter of Buffer I/O VIH (Input High Voltage, V) VIL (Input Low Voltage, V) VOH (Output High Voltage, V) VOL (Output Low Voltage, V) Buffer type Min Norm Max Min Norm Max Min Norm Max Min Norm Max LVCMOS2 1.7 - - - - 0.7 2.4 - - - - 0.4 SSTL2 1.57 - - - - 0.93 1.76 - - - - 0.74 |
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