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ST72P63BE1M1 Datasheet(PDF) 41 Page - STMicroelectronics

Part No. ST72P63BE1M1
Description  Low speed USB 8-bit MCU family with up to 32K Flash/ROM, DFU capability, 8-bit ADC, WDG, timer, SCI & I²C
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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ST72P63BE1M1 Datasheet(HTML) 41 Page - STMicroelectronics

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ST7263BDx ST7263BHx ST7263BKx ST7263BE
41/145
11 Miscellaneous register
Address: 0009h
Read/Write
Reset value: 0000 0000 (00h)
Bit 7:3 = Reserved
Bit 2 = SMS Slow Mode Select.
This bit is set by software and only cleared by hard-
ware after a reset. If this bit is set, it enables the use
of an internal divide-by-2 clock divider (refer to Fig-
ure 18 on page 26). The SMS bit has no effect on
the USB frequency.
0: Divide-by-2 disabled and CPU clock frequency
is standard
1: Divide-by-2 enabled and CPU clock frequency is
halved.
Bit 1 = USBOE USB enable.
If this bit is set, the port PC2 (PB1 on SO24) out-
puts the USB output enable signal (at “1” when the
ST7 USB is transmitting data).
Unused bits 7-4 are set.
Bit 0 = MCO Main Clock Out selection
This bit enables the MCO alternate function on the
PA0 I/O port. It is set and cleared by software.
0: MCO alternate function disabled (I/O pin free for
general-purpose I/O)
1: MCO alternate function enabled (fCPU on I/O
port)
70
-
-
-
-
-
SMS
USBOE
MCO


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