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T436416D-7SG Datasheet(PDF) 8 Page - Taiwan Memory Technology

Part # T436416D-7SG
Description  4M x 16 SDRAM 1M x 16bit x 4Banks Synchronous DRAM
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Manufacturer  TMT [Taiwan Memory Technology]
Direct Link  http://www.tmtech.com.tw
Logo TMT - Taiwan Memory Technology

T436416D-7SG Datasheet(HTML) 8 Page - Taiwan Memory Technology

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TE
CH
tm
T436416D
TM Technology Inc. reserves the right
P. 8
Publication Date: FEB. 2007
to change products or specifications without notice.
Revision: A
CLK
DQM
COMMAND
T0
T 1
T2
T3
T4T5
T6T7
T8
NOP
NOP
NOP
NOP
NOP
NOP
BANKA
ACTIVATE
DIN A0
DIN A1
DIN A2
DIN A3
1 Clk Interval
CAS# latency=2
tCK2, DQ's
READ A
WRITE A
: "H" or "L"
Read to Write Interval (Burst Length
≥≥≥≥ 4, CAS# Latency = 2)
CLK
DQM
COMMAND
T0
T 1
T2
T3
T4T5
T6T7
T8
NOP
READ A
NOP
WRITE B
NOP
NOP
NOP
DIN B0
DIN B1
DIN B2
DIN B3
CAS# latency=2
tCK2, DQ's
NOP
NOP
: "H" or "L"
Read to Write Interval (Burst Length
≥≥≥≥ 4, CAS# Latency = 2)
A read burst without the auto precharge function may be interrupted by a BankPrecharge/ PrechargeAll
command to the same bank. The following figure shows the optimum time that BankPrecharge/ PrechargeAll
command is issued in different CAS# latency.
CLK
COMMAND
CAS# latency=2
tCK2, DQ's
T0
T 1
T2
T3T4
T5T6
T7T8
READ A
NOP
NOP
NOP
NOP
Activate
NOP
NOP
Precharge
CAS# latency=3
tCK3, DQ's
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
ADDRESS
tRP
Bank,
Col A
Bank(s)
Bank,
Row
Read to Precharge (CAS# Latency = 2, 3)


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