T436432B-6SG datasheet(11/72 Pages) TMT

Part #	T436432B-6SG

Description	2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM

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Manufacturer	TMT [Taiwan Memory Technology]

Direct Link	http://www.tmtech.com.tw

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TE

CH

tm

T436432B

TM Technology Inc. reserves the right

P. 11

Publication Date: FEB. 2007

to change products or specifications without notice.

Revision: A

7

Write and AutoPrecharge command (refer to the following figure)

(RAS# = "H", CAS# = "L", WE# = "L", BS = Bank, A10 = "H", A0-A7 = Column Address)

The Write and AutoPrecharge command performs the precharge operation automatically after the write

operation. Once this command is given, any subsequent command can not occur within a time delay of {(burst

length -1) + tWR + tRP(min.)}. At full-page burst, only the write operation is performed in this command and the

auto precharge function is ignored.

CLK

COMMAND

T0

T 1

T2T3

T4T5

T6T7

T8

NOP

CAS# latency=2

tCK2, DQ's

CAS# latency=3

tCK3, DQ's

DIN A0

DIN A1

DIN A0

DIN A1

*

tDAL= tWR + tRP

* Begin AutoPrecharge

Bank can be reactivated at completion of

tDAL

Bank A

Activate

Write A

AutoPrecharge

tDAL

Burst Write with Auto-Precharge (Burst Length = 2, CAS# Latency = 2, 3)

8

Mode Register Set command

(RAS# = "L", CAS# = "L", WE# = "L", BS0,1 and A10-A0 = Register Data)

The mode register stores the data for controlling the various operating modes of SDRAM. The Mode

Register Set command programs the values of CAS# latency, Addressing Mode and Burst Length in the Mode

register to make SDRAM useful for a variety of different applications. The default values of the Mode Register

after power-up are undefined; therefore this command must be issued at the power-up sequence. The state of

pins BS0,1 and A10~A0 in the same cycle is the data written to the mode register. One clock cycle is required

to complete the write in the mode register (refer to the following figure). The contents of the mode register can

be changed using the same command and the clock cycle requirements during operation as long as all banks are

in the idle state.

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T436432B-6SG Datasheet(PDF) 11 Page - Taiwan Memory Technology

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