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INA326EA250 Datasheet(PDF) 10 Page - Texas Instruments |
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INA326EA250 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 23 page  INA326, INA327 10 SBOS222D www.ti.com Following this design procedure for R1 produces the maximum possible input stage gain for best accuracy and lowest noise. Circuit layout and supply bypassing can affect performance. Minimize the stray capacitance on pins 1 and 8. Use recom- mended supply bypassing, including a capacitor directly from pin 7 to pin 4 (V+ to V–), even with dual (split) power supplies (see Figure 1). OFFSET VOLTAGE, DRIFT, AND CIRCUIT VALUES As with other multi-stage instrumentation amplifiers, input- referred offset voltage depends on gain and circuit values. The specified offset and drift performance is rated at R1 = 2kΩ, R2 = 100kΩ, and VS = ±2.5V. Offset voltage and drift for other circuit values can be estimated from the following equations: VOS = 10µV + (50nA)(R2)/G (3) dVOS/dT = 0.12µV/°C + (0.16nA/°C)(R2)/G (4) These equations might imply that offset and drift can be minimized by making the value of R2 much lower than the values indicated in Figure 1. These values, however, have been chosen to assure that the output current into R2 is kept less than or equal to ±25µA, while maintaining R 1’s value greater than or equal to 2k Ω. Some applications with limited output voltage swing or low power-supply voltage may allow lower values for R2, thus providing lower input-referred offset voltage and offset voltage drift. Conversely, single-supply operation with R2 grounded re- quires that R2 values be made larger to assure that current remains under 25 µA. This will increase the input-referred offset voltage and offset voltage drift. Circuit conditions that cause more than 25 µA to flow in R 2 will not cause damage, but may produce more nonlinearity. INA327 ENABLE FUNCTION The INA327 adds an enable/shutdown function to the INA326. Its pinout differs from the INA326—see the Pin Configuration for detail. The INA327 can be enabled by applying a logic HIGH voltage level to the Enable pin. Conversely, a logic LOW voltage level will disable the amplifier, reducing its supply current from 2.4mA to typically 2 µA. For battery-operated applications, this feature may be used to greatly reduce the average current and extend battery life. This pin should be connected to a valid high or low voltage or driven, not left open circuit. The Enable pin can be modeled as a CMOS input gate as in Figure 2. The enable time following shutdown is 75 µs plus the settling time due to filters (see Typical Characteristics, “Input Offset Voltage vs Warm-up Time”). Disable time is 100 µs. This allows the INA327 to be operated as a “gated” amplifier, or to have its output multiplexed onto a common output bus. When disabled, the output assumes a high-impedance state. INA327 PIN 5 Pin 5 of the INA327 should be connected to V+ to ensure proper operation. DYNAMIC PERFORMANCE The typical characteristic “Gain vs Frequency” shows that the INA326 has nearly constant bandwidth regardless of gain. This results from the bandwidth limiting from the recom- mended filters. NOISE PERFORMANCE Internal auto-correction circuitry eliminates virtually all 1/f noise (noise that increases at low frequency) in gains of 100 or greater. Noise performance is affected by gain-setting resistor values. Follow recommendations in the “Setting Gain” section for best performance. Total noise is a combination of input stage noise and output stage noise. When referred to the input, the total mid-band noise is: VnV Hz nV Hz G N =+ 33 800 / / (5) The output noise has some 1/f components that affect performance in gains less than 10. See typical characteristic “Input-Referred Voltage Noise vs Frequency.” High-frequency noise is created by internal auto-correction circuitry and is highly dependent on the filter characteristics chosen. This may be the dominant source of noise visible when viewing the output on an oscilloscope. Low cutoff frequency filters will provide lowest noise. Figure 3 shows the typical noise performance as a function of cutoff frequency. FIGURE 2. Enable Pin Model. V+ Enable 6 2 µA FIGURE 3. Total Output Noise vs Required Filter Cutoff Frequency. 100 110 1k 10k Required Filter Cutoff Frequency (Hz) 1k 100 10 1 G = 10 G = 1 G = 100 G = 1000 |
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