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TMP320F28044ZGMS Datasheet(PDF) 2 Page - Texas Instruments |
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TMP320F28044ZGMS Datasheet(HTML) 2 Page - Texas Instruments |
2 / 107 page www.ti.com Contents TMS320F28044 Digital Signal Processor SPRS357B – AUGUST 2006 – REVISED MAY 2007 1 F28044 Digital Signal Processor ............................................................................................ 9 1.1 Features ....................................................................................................................... 9 1.2 Getting Started .............................................................................................................. 10 2 Introduction ....................................................................................................................... 11 2.1 Pin Assignments ............................................................................................................ 11 2.2 Signal Descriptions ......................................................................................................... 14 3 Functional Overview ........................................................................................................... 20 3.1 Memory Map ................................................................................................................ 21 3.2 Brief Descriptions ........................................................................................................... 23 3.2.1 C28x CPU ....................................................................................................... 23 3.2.2 Memory Bus (Harvard Bus Architecture) .................................................................... 23 3.2.3 Peripheral Bus .................................................................................................. 24 3.2.4 Real-Time JTAG and Analysis ................................................................................ 24 3.2.5 Flash .............................................................................................................. 24 3.2.6 M0, M1 SARAMs ............................................................................................... 24 3.2.7 L0, L1 SARAMs ................................................................................................. 24 3.2.8 Boot ROM ........................................................................................................ 25 3.2.9 Security .......................................................................................................... 26 3.2.10 Peripheral Interrupt Expansion (PIE) Block .................................................................. 27 3.2.11 External Interrupts (XINT1, XINT2, XNMI) ................................................................... 27 3.2.12 Oscillator and PLL .............................................................................................. 27 3.2.13 Watchdog ........................................................................................................ 27 3.2.14 Peripheral Clocking ............................................................................................. 27 3.2.15 Low-Power Modes .............................................................................................. 27 3.2.16 Peripheral Frames 0, 1, 2 (PFn) .............................................................................. 28 3.2.17 General-Purpose Input/Output (GPIO) Multiplexer ......................................................... 28 3.2.18 32-Bit CPU-Timers (0, 1, 2) ................................................................................... 28 3.2.19 Control Peripherals ............................................................................................. 28 3.2.20 Serial Port Peripherals ......................................................................................... 29 3.3 Register Map ................................................................................................................ 29 3.4 Device Emulation Registers ............................................................................................... 30 3.5 Interrupts .................................................................................................................... 31 3.5.1 External Interrupts .............................................................................................. 33 3.6 System Control ............................................................................................................. 34 3.6.1 OSC and PLL Block ............................................................................................ 36 3.6.2 Watchdog Block ................................................................................................. 38 3.7 Low-Power Modes Block .................................................................................................. 40 4 Peripherals ........................................................................................................................ 41 4.1 32-Bit CPU-Timers 0/1/2 .................................................................................................. 41 4.2 Enhanced PWM Modules (ePWM1-16) ................................................................................. 43 4.3 Hi-Resolution PWM (HRPWM) ........................................................................................... 48 4.4 Enhanced Analog-to-Digital Converter (ADC) Module ................................................................ 49 4.5 ADC Connections if the ADC Is Not Used ................................................................... 52 4.6 Serial Communications Interface (SCI) Module (SCI-A) .............................................................. 54 4.7 Serial Peripheral Interface (SPI) Module (SPI-A) ...................................................................... 57 4.8 Inter-Integrated Circuit (I2C) ............................................................................................... 60 4.9 GPIO MUX .................................................................................................................. 62 5 Device Support .................................................................................................................. 66 5.1 Device and Development Support Tool Nomenclature ................................................................ 66 5.2 Documentation Support ................................................................................................... 68 Contents 2 Submit Documentation Feedback |
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