DS1986

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volt programming voltage at the appropriate times. To execute a write sequence, a byte of data is first

loaded into the scratchpad and then programmed into the selected address. Write sequences always occur

a byte at a time. To execute a read sequence, the starting address is issued by the bus master and data is

read from the part beginning at that initial location and continuing to the end of the selected data field or

until a reset sequence is issued. All bits transferred to the DS1986 and received back by the bus master

are sent least significant bit first.

READ MEMORY [F0H]

The Read Memory command is used to read data from the 65536-bits EPROM data field. The bus master

follows the command byte with a two byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a

starting byte location within the data field. With every subsequent read data time slot the bus master

receives data from the DS1986 starting at the initial address and continuing until the end of the 65536-bits

data field is reached or until a Reset Pulse is issued. If reading occurs through the end of memory space,

the bus master may issue sixteen additional read time slots and the DS1986 will respond with a 16-bit

CRC of the command, address bytes and all data bytes read from the initial starting byte through the last

byte of memory. This CRC is the result of clearing the CRC generator and then shifting in the command

byte followed by the two address bytes and the data bytes beginning at the first addressed memory

location and continuing through to the last byte of the EPROM data memory. After the CRC is received

by the bus master, any subsequent read time slots will appear as logical 1s until a Reset Pulse is issued.

Any reads ended by a Reset Pulse prior to reaching the end of memory will not have the 16-bit CRC

available.

Typically a 16-bit CRC would be stored with each page of data to ensure rapid, error-free data transfers

that eliminate having to read a page multiple times to determine if the received data is correct or not. (See

Book of DS19xx iButton Standards, Chapter 7 for the recommended file structure to be used with the 1-

Wire environment.) If CRC values are imbedded within the data, a Reset Pulse may be issued at the end

of memory space during a Read Memory command.

READ STATUS [AAH]

The Read Status command is used to read data from the EPROM Status data field. The bus master

follows the command byte with a two byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a

starting byte location within the data field. With every subsequent read data time slot the bus master

receives data from the DS1986 starting at the supplied address and continuing until the end of an eight-

byte page of the EPROM Status data field is reached. At that point the bus master will receive a 16-bit

CRC of the command byte, address bytes and status data bytes. This CRC is computed by the DS1986

and read back by the bus master to check if the command word, starting address and data were received

correctly. If the CRC read by the bus master is incorrect, a Reset Pulse must be issued and the entire

sequence must be repeated.

Note that the initial pass through the Read Status flow chart will generate a 16-bit CRC value that is the

result of clearing the CRC generator and then shifting in the command byte followed by the two address

bytes, and finally the data bytes beginning at the first addressed memory location and continuing through

to the last byte of the addressed EPROM Status data page. The last byte of a Status data page always has

an ending address of xx7 or xxFH. Subsequent passes through the Read Status flow chart will generate a

16-bit CRC that is the result of clearing the CRC generator and then shifting in the new data bytes starting

at the first byte of the next page of the EPROM Status data field.

This feature is provided since the EPROM Status information may change over time making it impossible

to program the data once and include an accompanying CRC that will always be valid. Therefore, the

Read Status command supplies a 16-bit CRC that is based on and always is consistent with the current

data stored in the EPROM Status data field.