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LIS202DLTR Datasheet(PDF) 18 Page - STMicroelectronics |
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LIS202DLTR Datasheet(HTML) 18 Page - STMicroelectronics |
18 / 36 page Register mapping LIS202DL 18/36 6 Register mapping The table given below provides a listing of the 8 bit registers embedded in the device and the related address: Table 8. Register address map Name Type Register address Default Comment Hex Binary Reserved (do not modify) 00-0E Reserved Who_Am_I r 0F 000 1111 00111011 Dummy register Reserved (do not modify) 10-1F Reserved Ctrl_Reg1 rw 20 010 0000 00000111 Ctrl_Reg2 rw 21 010 0001 00000000 Ctrl_Reg3 rw 22 010 0010 00000000 HP_filter_reset r 23 010 0011 dummy Dummy register Reserved (do not modify) 24-26 Reserved Status_Reg r 27 010 0111 00000000 -- r 28 010 1000 Not used OutX r 29 010 1001 output -- r 2A 010 1010 Not used OutY r 2B 010 1011 output -- r 2C 010 1100 Not used -- r 2D 010 1101 Not used Reserved (do not modify) 2E-2F Reserved WU_CFG_1 rw 30 011 0000 00000000 WU_SRC_1(ack1) r 31 011 0001 00000000 WU_THS_1 rw 32 011 0010 00000000 WU_DURATION_1 rw 33 011 0011 00000000 WU_CFG_2 rw 34 011 0100 00000000 WU_SRC_2 (ack2) r 35 011 0101 00000000 WU_THS_2 rw 36 011 0110 00000000 WU_DURATION_2 rw 37 011 0111 00000000 CLICK_CFG rw 38 011 1000 00000000 CLICK_SRC (ack) r 39 011 1001 00000000 -- 3A Not used CLICK_THSY_X rw 3B 011 1011 00000000 -- rw 3C 011 1100 00000000 Not used |
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