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SC4605 Datasheet(PDF) 4 Page - Semtech Corporation

Part No. SC4605
Description  Low Input, High Efficiency Synchronous, Step Down Controller
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Maker  SEMTECH [Semtech Corporation]
Homepage  http://www.semtech.com
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SC4605 Datasheet(HTML) 4 Page - Semtech Corporation

 
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 2004 Semtech Corp.
www.semtech.com
SC4605
POWER MANAGEMENT
Ordering Information
Pin Descriptions
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D
R
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5
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6
4
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VCC: Positive supply rail for the IC. Bypass this pin to
GND with a 0.1 to 4.7µF low ESL/ESR ceramic capaci-
tor.
GND: All voltages are measured with respect to this pin.
All bypass and timing capacitors connected to GND should
have leads as short and direct as possible.
FS/SYNC: A capacitor from FS pin to GND sets the PWM
oscillator frequency. Use a high quality ceramic capacitor
with low ESL and ESR for best result. A minimum capaci-
tor value of 200pF ensures good accuracy and less sus-
ceptibility to circuit layout parasitics. When the FS is pulled
and held below 0.2V, its sleep mode operation is invoked.
The Sleepmode supply current is 10µA typical. The oscil-
lator and PWM are designed to provide practical opera-
tion up to 600kHz. In synchronous mode operation, a
low value resistor has to be connected between ground
and the timing capacitor. An external clock is then feed
into the resistor capacitor junction to override the inter-
nal clock.
VSENSE: This pin is the inverting input of the voltage
amplifier and serves as the output voltage feedback point
for the Buck converter. It senses the output voltage through
an external divider.
COMP: This is the output of the voltage amplifier. The
voltage at this output is inverted internally and connected
to the non-inverting input of the PWM comparator. A lead-
lag network around the voltage amplifier compensates for
the two pole LC filter characteristic inherent to voltage mode
control and is required in order to optimize the dynamic
performance of the voltage mode control loop.
ISET / PHASE: PHASE is connected to the junction be-
tween the two external power MOSFET transistors. The
voltage drop across the high side MOSFET during its con-
duction is compared with the voltage drop generated by
the internal 50µA current source and the external cur-
rent limit resistor connected between PHASE and Vin,
and forms the current limit comparator and logic sets
the PWM latch and terminates the output pulse. If the
converter output voltage drops below 68.75% of its nomi-
nal voltage, the controller stops switching and goes
through a soft start sequence. This prevents excess
power dissipation in the low side MOSFET during a short
circuit. The current limit threshold is set by the external
resistor between VCC and ISET.
BST: This pin connects the external charge pump, and
powers the high side MOSFET gate drive.
DRVH, DRVL: The output drivers are rated for 1A peak
currents. The PWM circuitry provides complementary drive
signals to the output stages. The cross conduction of
the external MOSFETs is prevented by monitoring the
voltage on the driver pins of the MOSFET pair in conjunc-
tion with a time delay optimized for FET turn-off charac-
teristics.
Notes:
(1) Only available in tape and reel packaging. A reel
contains 2500 devices.
(2) Lead free product. This product is fully WEEE and
RoHS compliant.
Pin Configuration
1
2
3
4
DRVH
BST
TOP VIEW
(MSOP-10)
7
8
9
10
PHASE
VCC
DRVL
ISET
GND
COMP
5
6
VSENSE
FS/SYNC


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