4, 8 Meg x 36 Parity DRAM SIMMs

Micron Technology, Inc., reserves the right to change products or specifications without notice.

DM45.pm5 – Rev. 3/97

„1997, Micron Technology, Inc.

6

4, 8 MEG x 36

PARITY DRAM SIMMs

OBSOLETE

CAPACITANCE

PARAMETER

SYMBOL 16MB

32MB

UNITS

NOTES

Input Capacitance: A0-A10

70

140

pF

2

Input Capacitance: WE#

94

188

pF

2

Input Capacitance: RAS0#, RAS1#, RAS2#, RAS3#

50

50

pF

2

Input Capacitance: CAS0#, CAS1#, CAS2#, CAS3#

25

50

pF

2

Input/Output Capacitance: DQ1-DQ8, DQ10-DQ17, DQ19-DQ26, DQ28-DQ35

10

18

pF

2

Input/Output Capacitance: DQ9, DQ18, DQ27, DQ36

16

28

pF

2

MAX

AC ELECTRICAL CHARACTERISTICS

±10%)

AC CHARACTERISTICS

-6

PARAMETER

SYMBOL

MIN

MAX

UNITS

NOTES

Access time from column address

30

ns

Column-address hold time (referenced to RAS#)

45

ns

Column-address setup time

0

ns

Row-address setup time

0

ns

Access time from CAS#

15

ns

Column-address hold time

10

ns

CAS# pulse width

15

10,000

ns

CAS# hold time (CBR REFRESH)

15

ns

4

CAS# to output in Low-Z

3

ns

21

CAS# precharge time

10

ns

13

Access time from CAS# precharge

35

ns

CAS# to RAS# precharge time

10

ns

CAS# hold time

60

ns

CAS# setup time (CBR REFRESH)

10

ns

4

Write command to CAS# lead time

15

ns

Data-in hold time

10

ns

18

Data-in setup time

0

ns

18

Output buffer turn-off delay

3

15

ns

17, 21

FAST-PAGE-MODE READ or WRITE cycle time

35

ns

Access time from RAS#

60

ns

RAS# to column-address delay time

15

ns

15

Row-address hold time

10

ns

RAS# pulse width

60

10,000

ns

RAS# pulse width (FAST PAGE MODE)

60

125,000

ns

Random READ or WRITE cycle time

110

ns

RAS# to CAS# delay time

20

ns

14

Read command hold time (referenced to CAS#)

0

ns

16

Read command setup time

0

ns

Refresh period (2,048 cycles)

32

ms

RAS# precharge time

40

ns

RAS# to CAS# precharge time

0

ns