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TAS5508APAGG4 Datasheet(PDF) 20 Page - Texas Instruments

Part No. TAS5508APAGG4
Description  8 Channel Digital Audio PWM Processor
Download  99 Pages
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
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TAS5508APAGG4 Datasheet(HTML) 20 Page - Texas Instruments

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Introduction
12
SLES119 − September 2004
TAS5508A
Coeff = 0 (lin)
(I2C 0x4F)
(I2C 0x50)
Coeff = 1 (lin)
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
IP Mixer 1
(I2C 0x41)
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
A
B
C
D
E
F
G
H
IP Mixer 2
(I2C 0x42)
IP Mixer 3
(I2C 0x43)
IP Mixer 4
(I2C 0x44)
IP Mixer 5
(I2C 0x45)
IP Mixer 6
(I2C 0x46)
IP Mixer 7
(I2C 0x47)
IP Mixer 8
(I2C 0x48)
Coeff = 0 (lin)
(I2C 0x4A)
Coeff = 0 (lin)
(I2C 0x49)
Coeff = 0 (lin)
(I2C 0x4C)
Coeff = 1 (lin)
(I2C 0x4D)
Coeff = 0 (lin)
(I2C 0x4B)
Coeff = 0 (lin)
(I2C 0x4E)
SDIN1−L(L)
SDIN1−R (R)
SDIN2−L (LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R (RBS)
SDIN4−L (C)
SDIN4−R (LFE)
Bass &
Treble 1
(0xDA−
0xDD)
L to
PWM1
OP Mixer 1
(I2C 0xAA)
8X2 Output
Mixer
7 DAP1
BQ
(0x51−
0x57)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 1
(0xDA−
0xDD)
R to
PWM2
OP Mixer 2
(I2C 0xAB)
8X2 Output
Mixer
7 DAP2
BQ
(0x58−
0x5E)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 2
(0xDA−
0xDD)
LS to
PWM3
OP Mixer 3
(I2C 0xAC)
8X2 Output
Mixer
7 DAP3
BQ
(0x5F−
0x65)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 2
(0xDA−
0xDD)
RS to
PWM4
OP Mixer 4
(I2C 0xAD)
8X2 Output
Mixer
7 DAP4
BQ
(0x66−
0x6C)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 3
(0xDA−
0xDD)
LBS to
PWM5
OP Mixer 5
(I2C 0xAE)
8X2 Output
Mixer
7 DAP5
BQ
(0x6D−
0x73)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 3
(0xDA−
0xDD)
RBS to
PWM6
OP Mixer 6
(I2C 0xAF)
8X2 Output
Mixer
7 DAP6
BQ
(0x74−
0x7A)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 1
(0xDA−
0xDD)
C to
PWM7
OP Mixer 7
(I2C 0xB0)
8X3 Output
Mixer
5 DAP7
BQ
(0x7D−
0x81)
Loud−
ness
(0x91−
0x95)
DRC1
(0x96−
0x9C)
Bass &
Treble 4
(0xDA−
0xDD)
Sub to
PWM8
OP Mixer 8
(I2C 0xB1)
8X3 Output
Mixer
5 DAP8
BQ
(0x84−
0x88)
Loud−
ness
(0x91−
0x95)
DRC2
(0x9D−
0xA1)
2 DAP7
BQ
(0x7B−
0x7C)
2 DAP8
BQ
(0x82−
0x83)
DAP1
Volume
(0xD1)
Master Vol
(0xD9)
DAP2
Volume
(0xD2)
Master Vol
(0xD9)
DAP3
Volume
(0xD3)
Master Vol
(0xD9)
DAP4
Volume
(0xD4)
Master Vol
(0xD9)
DAP5
Volume
(0xD5)
Master Vol
(0xD9)
DAP6
Volume
(0xD6)
Master Vol
(0xD9)
DAP7
Volume
(0xD7)
Master Vol
(0xD9)
DAP8
Volume
(0xD8)
Master Vol
(0xD9)
Max Vol
Max Vol
Max Vol
Max Vol
Max Vol
Max Vol
Max Vol
Max Vol
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L (LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R (RBS)
SDIN4−L (C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R (RBS)
SDIN4−L (C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R(RS)
SDIN3−L (LBS)
SDIN3−R (RBS)
SDIN4−L (C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R (RS)
SDIN3−L(LBS)
SDIN3−R (RBS)
SDIN4−L (C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R(RBS)
SDIN4−L (C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R(RBS)
SDIN4−L(C)
SDIN4−R (LFE)
SDIN1−L(L)
SDIN1−R(R)
SDIN2−L(LS)
SDIN2−R (RS)
SDIN3−L (LBS)
SDIN3−R(RBS)
SDIN4−L (C)
SDIN4−R(LFE)
Default input is BOLD
Figure 1−4. TAS5508A DAP Architecture With I2C Registers (Fs ≤ 96 kHz)


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