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SN75HVD08D Datasheet(PDF) 5 Page - Texas Instruments |
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SN75HVD08D Datasheet(HTML) 5 Page - Texas Instruments |
5 / 19 page www.ti.com VOD RL = 54 Ω ± 1% 50 Ω Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Ω tPLH tPHL 1.5 V 1.5 V 3 V ≈ 2 V ≈ –2 V 90% 10% 0 V VI VOD tr tf CL = 50 pF ±20% CL Includes Fixture and Instrumentation Capacitance D A B DE VCC VI Input Generator 90% 0 V 10% RL = 110 Ω ± 1% Input Generator 50 Ω Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Ω 3 V S1 0.5 V 3 V 0 V VOH ≈ 0 V tPHZ tPZH 1.5 V 1.5 V VI VO CL = 50 pF ±20% CL Includes Fixture and Instrumentation Capacitance D A B DE VO VI 2.3 V Input Generator 50 Ω 3 V VO S1 3 V 1.5 V 1.5 V tPZL tPLZ 2.3 V 0.5 V ≈ 3 V 0 V VOL VI VO Generator: PRR = 500 kHz, 50% Duty Cycle, tr <6 ns, tf <6 ns, Zo = 50 Ω RL = 110 Ω ± 1% CL = 50 pF ±20% CL Includes Fixture and Instrumentation Capacitance D A B DE VI ≈ 3 V SN75HVD08, SN65HVD08 SLLS550C – NOVEMBER 2002 – REVISED JULY 2006 PARAMETER MEASUREMENT INFORMATION (continued) Figure 3. Driver Switching Test Circuit and Voltage Waveforms Figure 4. Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms Figure 5. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms 5 Submit Documentation Feedback |
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