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S5935QRC Datasheet(PDF) 3 Page - Applied Micro Circuits Corporation |
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S5935QRC Datasheet(HTML) 3 Page - Applied Micro Circuits Corporation |
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3 / 204 page  Part Number S5935 Revision 1.02 – June 27, 2006 AMCC Confidential and Proprietary DS1527 3 S5935 PCI Product Data Book FEATURES • PCI 2.1 Compliant Master/Slave Device • Full 132 Mbytes/sec Transfer Rate • Supports new Intel 440BX/GX Chipsets • Supports new WinNT Service Pack 2 & 3 • PCI Bus Operation DC to 33 MHz • 8/16/32 Bit Add-On User Bus • Four Definable Pass-Thru Data Channels • Two 32 Byte Internal FIFOs w/DMA • Synchronous Add-On Bus Operation • Mail Box Registers w/Byte Level Status • Direct Mail Box Data Strobe/Interrupts • Direct PCI & Add-On Interrupt Pins • Optional Non-Volatile Memory Boot Loading • Optional Expansion BIOS/POST Code APPLICATIONS • High Speed Networking • Digital Video Applications • I/O Communications Ports • High Speed Data Input/Output • Multimedia Communications • Memory Interfaces • High Speed Data Acquisition • Data Encryption/Decryption • Intel i960 Interface • General Purpose PCI Interfacing • Existent S5933 Design Upgrades DESCRIPTION The PCI Local bus concept was developed to break the PC data I/O bottleneck and clearly opens the door to increasing system speed and expansion capabili- ties. The PCI Local bus moves high speed peripherals from the I/O bus and places them closer to the sys- tem’s processor bus, providing faster data transfers between the processor and peripherals. The PCI Local bus also addresses the industry’s need for a bus stan- dard which is not directly dependent on the speed, size and type of system processor. It represents the first microprocessor independent bus offering perfor- mance more than adequate for the most demanding applications such as full-motion video. Applied Micro Circuits Corporation (AMCC), the pre- mier supplier of single chip solutions, has developed the S5935 to solve the problem of interfacing applica- tions to the PCI Local bus while offering support for newer PCI chipsets and operating systems. The S5935 is a powerful and flexible PCI controller sup- porting several levels of interface sophistication. At the lowest level, it can serve simply as a PCI bus Target with modest transfer requirements. For high-perfor- mance applications, the S5935 can become a Bus Master to attain the PCI Local bus peak transfer capa- bility of 132 MBytes/sec. The S5935 PCI controller also maintains dropin compatibility for upgrading many existent S5933 designs requiring migration into new motherboard architectures, PCI BIOSs and software operating systems. Figure 1. S5935 Block Diagram User Application Satellite Receiver/ Modem Proprietary Backplane Graphics/ MPEG/ Grabber ISDN FDDI ATM I/O Audio Serial/Parallel nvRAM Configuration Space Expansion BIOS AMCC Add-On Local Bus Interface Logic Mux/Demux Buffers S5935 Status Registers Configuration Registers Mailboxes FIFOs Bus MasterTransfer Count &Address Registers Pass-Thru Data & Address Registers 2.1 PCI Local Bus Interface Logic Mux/Demux Buffers Read/Write Control |
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