TMS29F040

524288 BY 8-BIT

FLASH MEMORY

SMJS820C – APRIL 1996 – REVISED JUNE 1998

5

POST OFFICE BOX 1443

operation

Table 1 summarizes the operation modes.

Table 1. Operation Modes

MODE

FUNCTIONS†

MODE

E

G

W

A0

A1

A6

A9

DQ0 – DQ7

Read

VIL

VIL

VIH

A0

A1

A6

A9

Data out

Output disable

VIL

VIH

VIH

X

X

X

X

Hi-Z

Standby and write inhibit

VIH

X

X

X

X

X

X

Hi-Z

Algorithm selection mode

V

V

V

VIL

V

V

V

Mfr. equivalent code 01h

Algorithm-selection mode

VIL

VIL

VIH

VIH

VIL

VIL

VID

Device equivalent code A4h

Write‡

VIL

VIH

VIL

A0

A1

A6

A9

Data in

Sector-protect§

VIL

VID

VIL

X

X

X

VID

X

Sector-protect verify§

VIL

VIL

VIH

VIL

VIH

VIL

VID

Data out

Sector-unprotect§¶

VID

VID

VIL

X

X

VIH

VID

X

Sector-unprotect verify§

VIL

VIL

VIH

VIL

VIH

VIH

VID

Data out

Erase operations

VIL

VIH

See

Note 1

See

Note 1

See

Note 1

See

Note 1

See

Note 1

See Note 1

† X can be VIL or VIH.

‡ Refer to Table 3 for valid address and data during write (byte program).

§ Operation at VCC = 5.0 V and TA = 25°C.

¶ Address pins A12 and A16 = VIH.

NOTE 1: See Figure 6, Figure 7, Figure 8, and Figure 9.

read mode

To read the output of the TMS29F040, a low-level logic signal is applied to the E and G pins. When two or more

TMS29F040 devices are connected in parallel, the output of any one device can be read without interference.

The E pin is power control and is used for device selection. The G pin is output control and is used to gate the

data output onto the bus from the selected device.

standby mode

mode, the outputs are placed in the high-impedance state. Applying a CMOS logic-high level on E reduces the

current to 100

µA maximum. Applying a TTL logic-high level on E reduces the current to 1 mA maximum.

If the TMS29F040 is deselected during erasure or programming, the device continues to draw active current

until the operation is complete.

output disable

in the high-impedance state.