P1402CDG datasheet(2/5 Pages) ETC2

Part #	P1402CDG

Description	N-Channel Logic Level Enhancement Mode Field Effect Transistor

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NOV-05-2004

N-Channel Logic Level Enhancement

Mode Field Effect Transistor

P1402CDG

TO-252 (DPAK)

Lead-Free

NIKO-SEM

DYNAMIC

Input Capacitance

Ciss

500

Output Capacitance

Coss

310

Reverse Transfer Capacitance

Crss

VGS = 0V, VDS = 15V, f = 1MHz

125

pF

Total Gate Charge

2

Qg

17

Gate-Source Charge

2

Qgs

1.5

Gate-Drain Charge

2

Qgd

VDS = 0.5V(BR)DSS, VGS = 5V,

ID = 18A

10.5

nC

Turn-On Delay Time

2

td(on)

7.5

Rise Time

2

tr

VDS = 10V,

83

Turn-Off Delay Time

2

td(off)

ID ≅ 18A, VGS = 5V, RGS = 3.3Ω

18

Fall Time

2

tf

23

nS

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)

Continuous Current

IS

45

Pulsed Current

3

ISM

140

A

Forward Voltage

1

VSD

IF = IS, VGS = 0V

1.3

V

Reverse Recovery Time

trr

37

nS

Peak Reverse Recovery Current

IRM(REC)

IF = IS, dlF/dt = 100A / µS

200

A

Reverse Recovery Charge

Qrr

0.043

µC

1Pulse test : Pulse Width

≤ 300 µsec, Duty Cycle ≤ 2％.

2Independent of operating temperature.

3Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P1402CDG”, DATE CODE or LOT #

Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

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