Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

KK74HC112A Datasheet(PDF) 4 Page - KODENSHI KOREA CORP.

Part No. KK74HC112A
Description  Dual J-K Flip-Flop with Set and Reset High-Performance Silicon-Gate CMOS
Download  6 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  KODENSHI [KODENSHI KOREA CORP.]
Direct Link  http://www.kodenshi.co.kr
Logo KODENSHI - KODENSHI KOREA CORP.

KK74HC112A Datasheet(HTML) 4 Page - KODENSHI KOREA CORP.

  KK74HC112A Datasheet HTML 1Page - KODENSHI KOREA CORP. KK74HC112A Datasheet HTML 2Page - KODENSHI KOREA CORP. KK74HC112A Datasheet HTML 3Page - KODENSHI KOREA CORP. KK74HC112A Datasheet HTML 4Page - KODENSHI KOREA CORP. KK74HC112A Datasheet HTML 5Page - KODENSHI KOREA CORP. KK74HC112A Datasheet HTML 6Page - KODENSHI KOREA CORP.  
Zoom Inzoom in Zoom Outzoom out
 4 / 6 page
background image
KK74HC112A
AC ELECTRICAL CHARACTERISTICS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to
-55
°C
≤85°C ≤125°C
Unit
fmax
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0
4.5
6.0
6.0
30
35
4.8
24
28
4.0
20
24
MHz
tPLH, tPHL
Maximum Propagation Delay, Clock to Q or Q
(Figures 1 and 4)
2.0
4.5
6.0
125
25
21
155
31
26
190
38
32
ns
tPLH, tPHL
Maximum Propagation Delay , Reset to Q or Q
(Figures 2 and 4)
2.0
4.5
6.0
155
31
26
195
39
33
235
47
40
ns
tPLH, tPHL
Maximum Propagation Delay ,Set to Q or Q
(Figures 2 and 4)
2.0
4.5
6.0
165
33
28
205
41
35
250
50
43
ns
tTLH, tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
4.5
6.0
75
15
13
95
19
16
110
22
19
ns
CIN
Maximum Input Capacitance
-
10
10
10
pF
Power Dissipation Capacitance (Per Flip-Flop)
Typical @25
°C,V
CC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
PD=CPDVCC
2f+I
CCVCC
35
pF
TIMING REQUIREMENTS (CL=50pF,Input tr=tf=6.0 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
25
°C to-55°C
≤85°C
≤125°C
Unit
tSU
Minimum Setup Time,J or K
to Clock (Figure 3)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
th
Minimum Hold Time, Clock
to J or K (Figure 3)
2.0
4.5
6.0
3
3
3
3
3
3
3
3
3
ns
trec
Minimum Recovery Time, Set
or Reset Inactive to Clock
(Figure 2)
2.0
4.5
6.0
100
20
17
125
25
21
150
30
26
ns
tw
Minimum Pulse Width, Clock
(Figure 1)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
ns
tw
Minimum Pulse Width, Set or
Reset (Figure 2)
2.0
4.5
6.0
80
16
14
100
20
17
120
24
20
ns
tr, tf
Maximum Input Rise and Fall
Times (Figure 1)
2.0
4.5
6.0
1000
500
400
1000
500
400
1000
500
400
ns
4


Html Pages

1  2  3  4  5  6 


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn