DG509A datasheet(1/19 Pages) INTERSIL

Part #	DG509A

Description	CMOS Analog Multiplexers

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Manufacturer	INTERSIL [Intersil Corporation]

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3137.3

DG506A, DG507A, DG508A, DG509A

CMOS Analog Multiplexers

The DG506A, DG507A, DG508A and DG509A are CMOS

Monolithic 16-Channel/Dual 8-Channel and 8-Channel/Dual

4-Channel Analog Multiplexers, which can also be used as

demultiplexers. An enable input is provided. When the

enable input is high, a channel is selected by the address

inputs, and when low, all channels are off.

A channel in the ON state conducts current equally well in

both directions. In the OFF state each channel blocks

voltages up to the supply rails. The address inputs and the

enable input are TTL and CMOS compatible over the full

speciﬁed operating temperature range.

The DG506A, DG507A, DG508A and DG509A are pinout

compatible with the industry standard devices.

Features

• Low Power Consumption

• TTL and CMOS-Compatible Address and Enable Inputs

• 44V Maximum Power Supply Rating

• High Latch-Up Immunity

• Break-Before-Make Switching

• Alternate Source

Applications

• Data Acquisition Systems

• Communication Systems

• Signal Multiplexing/Demultiplexing

• Audio Signal Multiplexing

Ordering Information

PART NUMBER

TEMP.

RANGE (oC)

PACKAGE

PKG.

NO.

DG506AAK

-55 to 125

28 Ld CERDIP

F28.6

DG506ACJ

0 to 70

28 Ld PDIP

E28.6

DG506ACY

0 to 70

28 Ld SOIC

M28.3

DG507ABK

-25 to 85

28 Ld CERDIP

F28.6

DG507ACJ

0 to 70

28 Ld PDIP

E28.6

DG507ACY

0 to 70

28 Ld SOIC

M28.3

DG508AAK

-55 to 125

16 Ld CERDIP

F16.3

DG508ABK

-25 to 85

16 Ld CERDIP

F16.3

DG508ACJ

0 to 70

16 Ld PDIP

E16.3

DG509ACJ

0 to 70

16 Ld PDIP

E16.3

DG509ACY

0 to 70

16 Ld SOIC

M16.3

PART NUMBER

TEMP.

RANGE (oC)

PACKAGE

PKG.

NO.

Pinouts

DG506A (PDIP, CERDIP, SOIC)

TOP VIEW

DG507A (PDIP, CERDIP, SOIC)

TOP VIEW

DG508A (PDIP, CERDIP)

TOP VIEW

DG509A (PDIP, SOIC)

TOP VIEW

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

V+

NC

S16

S15

S14

S13

S12

S11

S10

S9

GND

NC

A3

D

S8

S7

S6

S5

S3

S1

EN

A0

A1

A2

V-

S4

S2

V+

DB

NC

S8B

S7B

S6B

S5B

S4B

S3B

S2B

S1B

GND

NC

DA

S8A

S7A

S6A

S5A

S3A

S1A

EN

A0

A1

A2

V-

S4A

S2A

28

27

26

25

24

23

22

21

20

19

18

17

16

15

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

A0

EN

V-

S1

S2

S3

D

S4

A1

GND

V+

S5

S6

S7

S8

A2

14

15

16

9

13

12

11

10

1

2

3

4

5

7

6

8

A0

EN

V-

S1A

S2A

S3A

DA

S4A

A1

V+

S1B

S2B

S3B

S4B

DB

GND

Data Sheet

November 1999

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

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