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KK74HC03A Datasheet(PDF) 2 Page - KODENSHI_AUK CORP.

Part # KK74HC03A
Description  Quad 2-Input NAND Gate with Open-Drain Outputs High-Performance Silicon-Gate CMOS
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Manufacturer  KODENSHI [KODENSHI_AUK CORP.]
Direct Link  http://www.kodenshi.co.kr
Logo KODENSHI - KODENSHI_AUK CORP.

KK74HC03A Datasheet(HTML) 2 Page - KODENSHI_AUK CORP.

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KK74HC03A
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +7.0
V
VIN
DC Input Voltage (Referenced to GND)
-1.5 to VCC +1.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
IIN
DC Input Current, per Pin
±20
mA
IOUT
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
Tstg
Storage Temperature
-65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
°C from 65° to 125°C
SOIC Package: : - 7 mW/
°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
VIN, VOUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
-55
+125
°C
tr, tf
Input Rise and Fall Time (Figure 1)
VCC =2.0 V
VCC =4.5 V
VCC =6.0 V
0
0
0
1000
500
400
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2


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