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KK74ACT163 Datasheet(PDF) 4 Page - KODENSHI_AUK CORP. |
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KK74ACT163 Datasheet(HTML) 4 Page - KODENSHI_AUK CORP. |
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4 / 8 page  KK74ACT163 AC ELECTRICAL CHARACTERISTICS (VCC=5V±10% CL=50pF,Input tr=tf=3.0 ns) Guaranteed Limits Symbol Parameter 25 °C -40 °C to 85°C Unit Min Max Min Max fmax Maximum Clock Frequency (Figure 1) 120 105 MHz tPLH Propagation Delay Clock to Q (Figure 1) 1.5 10.0 1.5 11.0 ns tPHL Propagation Delay Clock to Q (Figure 1) 1.5 11.0 1.5 12.0 ns tPLH Propagation Delay, Clock to Ripple Cary Out (Figure 1) 2.5 11.5 2.0 13.5 ns tPHL Propagation Delay, Clock to Ripple Cary Out (Figure 1) 3.0 13.5 2.0 15.0 ns tPLH Propagation Delay, Enable T to Ripple Carry Out (Figure 2) 2.0 9.0 1.5 10.5 ns tPHL Propagation Delay, Enable T to Ripple Carry Out (Figure 2) 2.0 10.0 2.0 11.0 ns CIN Maximum Input Capacitance 4.5 4.5 pF Typical @25 °C,V CC=5.0 V CPD Power Dissipation Capacitance 45 pF TIMING REQUIREMENTS (VCC=5.0V±10%, CL=50pF, Input tr=tf=3.0 ns) Guaranteed Limit Symbol Parameter +25 ° C -40 ° C to +85 ° C Unit tsu Minimum Setup Time, Preset Data Inputs to Clock (Figure 4) 10.0 12.0 ns th Minimum Hold Time, Clock to Preset Data Inputs (Figure 4) 0.5 0.5 ns tsu Minimum Setup Time, Reset to Clock (Figure 3) 10.0 11.5 ns th Minimum Hold Time, Clock to Reset (Figure 3) -0.5 -0.5 ns tsu Minimum Setup Time, Load to Clock (Figure 5) 8.5 10.5 ns th Minimum Hold Time, Clock to Load or Preset Data Inputs (Figure 5) -0.5 0 ns tsu Minimum Setup Time, Enable T or Enable P to Clock (Figure 5) 5.5 6.5 ns th Minimum Hold Time, Clock to Enable T or Enable P (Figure 5) 0 0.5 ns tw Minimum Pulse Width, (Load) (Figure 3) 3.5 3.5 ns tw Minimum Pulse Width, (Count) (Figure 3) 3.5 3.5 ns 4 |
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Similar Description - KK74ACT163 |
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