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KK74AC109 Datasheet(PDF) 1 Page - KODENSHI KOREA CORP.

Part No. KK74AC109
Description  Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS
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Maker  KODENSHI [KODENSHI KOREA CORP.]
Homepage  http://www.kodenshi.co.kr
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KK74AC109 Datasheet(HTML) 1 Page - KODENSHI KOREA CORP.

   
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TECHNICAL DATA
KK74AC109
Dual J-K Flip-Flop
with Set and Reset
ORDERING INFORMATION K
KK74AC109N Plastic
KK74AC109D SOIC
TA = -40° to 85° C for all packages
High-Speed Silicon-Gate CMOS
The KK74AC109 is identical in pinout to the LS/ALS109,HC/HCT109.
The device inputs are compatible with standard CMOS outputs, with
pullup resistors, they are compatible with LS/ALS outputs.
This device consists of two J-K flip-flops with individual set, reset,
and clock inputs. Changes at the inputs are reflected at the outputs with
the next low-to-high transition of the clock. Both Q to Q outputs are
available from each flip-flop.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
LOGIC DIAGRAM
PIN 16=VCC
PIN 8 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Outputs
Set
Reset
Clock
J
K
Q
Q
L
H
X
X
X
H
L
H
L
X
X
X
L
H
L
L
X
X
X
H
*
H
*
H
H
L
L
L
H
H
H
H
L
Toggle
H
H
L
H
No Change
H
H
H
H
H
L
H
H
L
X
X
No Change
X = Don’t care
*Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
1


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