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ADCMP609BRMZ1 Datasheet(PDF) 1 Page - Analog Devices |
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ADCMP609BRMZ1 Datasheet(HTML) 1 Page - Analog Devices |
1 / 12 page Rail-to-Rail, Fast, Low Power 2.5 V to 5.5 V, Single-Supply TTL/CMOS Comparator ADCMP609 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved. FEATURES Fully specified rail to rail at VCC = 2.5 V to 5.5 V Input common-mode voltage from −0.2 V to VCC + 0.2 V Low glitch CMOS-/TTL-compatible output stage 40 ns propagation delay Low power 1 mW at 2.5 V Shutdown pin Programmable hysteresis Power supply rejection > 60 dB −40°C to +125°C operation APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators FUNCTIONAL BLOCK DIAGRAM ADCMP609 NONINVERTING INPUT INVERTING INPUT Q OUTPUT + – SDN Figure 1. GENERAL DESCRIPTION The ADCMP609 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc. proprietary process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE − 0.2 V to VCC + 0.2 V, low noise, TTL-/ CMOS-compatible output drivers, and adjustable hysteresis and/or shutdown inputs. The device offers 40 ns propagation delay driving a 15 pF load with 10 mV overdrive on 500 μA typical supply current. A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a −0.2 V to +3.0 V input signal range up to a +5.5 V positive supply with a −0.2 V to +5.7 V input signal range. The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator’s input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. A programmable hysteresis features is also provided. The ADCMP609, available in an 8-lead MSOP package, features a shutdown pin and hysteresis control. |
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