6

Serial Interface Reference

S

START condition

P

STOP condition

SDA

SCL

Description

TheprogramminginterfacetotheADJD-S311isa2-wireserialbus.Thebusconsistsofaserialclock(SCL)andaserial

data(SDA)line.TheSDAlineisbi-directionalonADJD-S311andmustbeconnectedthroughapull-upresistortothe

positivepowersupply.Whenthebusisfree,bothlinesareHIGH.

The2-wireserialbusonADJD-S311requiresonedevicetoactasamasterwhileallotherdevicesmustbeslaves.A

masterisadevicethatinitiatesadatatransferonthebus,generatestheclocksignalandterminatesthedatatransfer

whileadeviceaddressedbythemasteriscalledaslave.Slavesareidentifiedbyuniquedeviceaddresses.

Bothmasterandslavecanactasatransmitterorareceiverbutthemastercontrolsthedirectionfordatatransfer.A

transmitterisadevicethatsendsdatatothebusandareceiverisadevicethatreceivesdatafromthebus.

TheADJD-S311serialbusinterfacealwaysoperatesasaslavetransceiverwithadatatransferrateofupto100kbit/s.

START/STOP Condition

The master initiates and terminates all serial data transfers.To begin a serial data transfer, the master must send a

uniquesignaltothebuscalledaSTARTcondition.ThisisdefinedasaHIGHtoLOWtransitionontheSDAlinewhile

SCLisHIGH.

ThemasterterminatestheserialdatatransferbysendinganotheruniquesignaltothebuscalledaSTOPcondition.

ThisisdefinedasaLOWtoHIGHtransitionontheSDAlinewhileSCLisHIGH.

ThebusisconsideredtobebusyafteraSTART(S)condition.ItwillbeconsideredfreeacertaintimeaftertheSTOP(P)

condition.ThebusstaysbusyifarepeatedSTART(Sr)issentinsteadofaSTOPcondition.

TheSTARTandrepeatedSTARTconditionsarefunctionallyidentical.Seefigure3.

Figure 3. START/STOP Condition

Figure 4. Data Bit Transfer

SDA

SCL

Data valid

Data change

Data Transfer

ThemasterinitiatesdatatransferafteraSTARTcondition.Dataistransferredinbitswiththemastergeneratingone

clockpulseforeachbitsent.Foradatabittobevalid,theSDAdatalinemustbestableduringtheHIGHperiodofthe

SCLclockline.OnlyduringtheLOWperiodoftheSCLclocklinecantheSDAdatalinechangestatetoeitherHIGHor

LOW.