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STR750FXX Datasheet(PDF) 6 Page - STMicroelectronics

Part No. STR750FXX
Description  ARM7TDMI-S™ 32-bit MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STR750FXX Datasheet(HTML) 6 Page - STMicroelectronics

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Introduction
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
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Serial Memory Interface (SMI)
The Serial Memory interface is directly able to access up to 4 serial FLASH devices. It can
be used to access data, execute code directly or boot the application from external memory.
The memory is addressed as 4 banks of up to 16 Mbytes each.
Clocks and start-up
After RESET or when exiting from Low Power Mode, the CPU is clocked immediately by an
internal RC oscillator (FREEOSC) at a frequency centered around 5 MHz, so the application
code can start executing without delay. In parallel, the 4/8 MHz Oscillator is enabled and its
stabilization time is monitored using a dedicated counter.
An oscillator failure detection is implemented: when the clock disappears on the XT1 pin, the
circuit automatically switches to the FREEOSC oscillator and an interrupt is generated.
In Run mode, the AHB and APB clock speeds can be set at a large number of different
frequencies thanks to the PLL and various prescalers: up to 60 MHz for AHB and up to 32
MHz for APB when fetching from Flash (64 MHz and 32 MHz when fetching from SRAM).
In SLOW mode, the AHB clock can be significantly decreased to reduce power
consumption.
The built-in Clock Controller also provides the 48 MHz USB clock directly without any extra
oscillators or PLL. For instance, starting from the 4 MHz crystal source, it is possible to
obtain in parallel 60 MHz for the AHB clock, 48 MHz for the USB clock and 30 MHz for the
APB peripherals.
Boot modes
At start-up, boot pins are used to select one of five boot options:
Boot from internal flash
Boot from external serial Flash memory
Boot from internal boot loader
Boot from internal SRAM
Booting from SMI memory allows booting from a serial flash. This way, a specific boot
monitor can be implemented. Alternatively, the STR750F can boot from the internal boot
loader that implements a boot from UART.
Power Supply Schemes
You can connect the device in any of the following ways depending on your application.
Power Scheme 1: Single external 3.3V power source. In this configuration the
VCORE supply required for the internal logic is generated internally by the main voltage
regulator and the VBACKUP supply is generated internally by the low power voltage
regulator. This scheme has the advantage of requiring only one 3.3V power source.
Power Scheme 2: Dual external 3.3V and 1.8V power sources. In this configuration,
the internal voltage regulators are switched off by forcing the VREG_DIS pin to high
level. VCORE is provided externally through the V18 and V18REG power pins and
VBACKUP through the V18_BKP pin. This scheme is intended to save power consumption
for applications which already provide an 1.8V power supply.
Power Scheme 3: Single external 5.0V power source. In this configuration the
VCORE supply required for the internal logic is generated internally by the main voltage


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