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TSL2550 Datasheet(PDF) 8 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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TSL2550 Datasheet(HTML) 8 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
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8 / 20 page  TSL2550 AMBIENT LIGHT SENSOR WITH SMBus INTERFACE TAOS029L − OCTOBER 2007 8 r r Copyright E 2007, TAOS Inc. The LUMENOLOGY r Company www.taosinc.com Command Register The command register is used primarily to: D Select which ADC register will be read during a read cycle D Switch the dynamic range of the device between standard and extended range modes D Power the device up for operation or power it down for minimum power consumption Table 1 shows the six primary commands used to control the TSL2550. Table 1. Command Summary COMMAND FUNCTION 0x00h Power-down state 0x03h Power-up state/Read command register 0x1Dh Write command to assert extended range mode 0x18h Write command to reset or return to standard range mode 0x43h Read ADC channel 0 0x83h Read ADC channel 1 The content of the command register defaults to 0x00h when power is applied to the device, placing the device into the power-down mode. Once the TSL2550 is set to the standard range mode (0x18h) or the extended range mode (0x1Dh), the device remains in that mode until it is powered down or the mode is changed via the command register. The 0x03h command has two purposes: It is used to power up the device and can also be used to check that the device is communicating properly. The value returned during a read cycle should be 0x03h. ADC Register The TSL2550 contains two ADC registers (channel 0 and channel 1). Each ADC register contains two component fields that are used to determine the logarithmic ADC count value: CHORD bits and STEP bits. The CHORD bits correspond to the most significant portion of the ADC value and specifies a segment of the piece-wise linear approximation. The STEP bits correspond to the least significant portion of the ADC count value and specifies a linear value within a segment. CHORD and STEP bits all equal to 0 corresponds to a condition in which the light level is below the detection limit of the sensor. CHORD and STEP bits all equal to 1 corresponds to an overflow condition. Each of the two ADC value registers contain seven data bits and a valid bit as described in Table 2. Table 2. ADC Register Data Format VALID CHORD BITS STEP BITS B7 B6 B5 B4 B3 B2 B1 B0 VALID C2 C1 C0 S3 S2 S1 S0 FIELD BITS DESCRIPTION VALID 7 ADC channel data is valid. One indicates that the ADC has written data into the channel data register, since ADCEN was asserted in the COMMAND register. CHORD 6 to 4 CHORD number. STEP 3 to 0 STEP number. |
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