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P89V52X2FBD Datasheet(PDF) 7 Page - NXP Semiconductors |
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P89V52X2FBD Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 56 page P89V52X2_1 © NXP B.V. 2007. All rights reserved. Preliminary data sheet Rev. 01 — 7 June 2007 7 of 56 NXP Semiconductors P89V52X2 80C51 with 256 B RAM, 192 B data EEPROM [1] ALE loading issue: When ALE pin experiences higher loading (>30 pF) during the reset, the microcontroller may accidentally enter into modes other than normal working mode. The solution is to add a pull-up resistor of 3 k Ω to 50 kΩ to V DD, e.g., for ALE pin. [2] For 6-clock mode, ALE is emitted at 1 ⁄ 3 of crystal frequency. P3.5/T1/CEX4 15 11 17 I/O P3.5 — Port 3 bit 5. I T1 — External count input to Timer/Counter 1 P3.6/WR 16 12 18 O P3.6 — Port 3 bit 6. O WR — External data memory write strobe P3.7/RD 17 13 19 O P3.7 — Port 3 bit 7. O RD — External data memory read strobe. PSEN 29 26 32 I/O Program Store Enable: PSEN is the read strobe for external program memory. When the device is executing from internal program memory, PSEN is inactive (HIGH). When the device is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. RST 9410 I Reset: While the oscillator is running, a HIGH logic state on this pin for two machine cycles will reset the device. EA 31 29 35 I External Access Enable: EA must be connected to VSS in order to enable the device to fetch code from the external program memory. EA must be strapped to VDD for internal program execution. ALE 30 2733I/O Address Latch Enable: ALE is the output signal for latching the low byte of the address during an access to external memory. Normally the ALE[1] is emitted at a constant rate of 1 ⁄ 6 the crystal frequency [2] and can be used for external timing and clocking. One ALE pulse is skipped during each access to external data memory. However, if AO is set to ‘1’, ALE is disabled. XTAL1 19 15 21 I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator circuits. XTAL2 18 14 20 O Crystal 2: Output from the inverting oscillator amplifier. VDD 40 38 44 I Power supply VSS 20 16 22 I Ground Table 2. Pin description …continued Symbol Pin Type Description DIP40 LQFP44 PLCC44 |
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