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MB90483CPFV Datasheet(PDF) 49 Page - Fujitsu Component Limited. |
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MB90483CPFV Datasheet(HTML) 49 Page - Fujitsu Component Limited. |
49 / 120 page MB90480/485 Series 49 7. DTP/External Interrupt The DTP (Data Transfer Peripheral) is a peripheral block that interfaces external peripherals to the F2MC-16LX CPU. The DTP receives DMA and interrupt processing requests from external peripherals and passes the requests to the F2MC-16LX CPU to activate the extended intelligent µDMAC or interrupt processing. (1) Detailed Register Descriptions (2) Block Diagram Interrupt/DTP Enable Register (ENIR : Enable Interrupt Request Register) Interrupt/DTP Source Register (EIRR : External Interrupt Request Register) Interrupt Level Setting Register (ELVR : External Level Register) ENIR Initial value Address : 00000CH 00000000B EIRR Initial value Address : 00000DH XXXXXXXXB Initial value Address : 00000EH 00000000B Initial value Address : 00000FH 00000000B 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W EN6 EN7 EN5 EN4 EN3 EN2 EN1 EN0 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W ER6 ER7 ER5 ER4 ER3 ER2 ER1 ER0 76 5 4 3 2 1 0 R/W R/W R/W R/W R/W R/W R/W R/W LA3 LB3 LB2 LA2 LB1 LA1 LB0 LA0 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W LA7 LB7 LB6 LA6 LB5 LA5 LB4 LA4 4 4 4 8 4 F2MC-16 bus Interrupt/DTP enable register Gate Source F/F Edge detection circuit Request input Interrupt/DTP source register Interrupt level setting register |
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