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MB90480 Datasheet(PDF) 54 Page - Fujitsu Component Limited. |
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MB90480 Datasheet(HTML) 54 Page - Fujitsu Component Limited. |
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54 / 120 page 
MB90480/485 Series 54 (2) Output Compare The output compare module is composed of a 16-bit compare register, compare output pin unit, and control register. When the value in the compare register in this module matches the 16-bit free run timer, the pin output levels can be inverted and an interrupt generated. • There are six compare registers in all, each operating independently. A setting is available to allow two compare registers to be used to control output. • Interrupts can be set in terms of compare match events. • Register List Output compare registers (OCCP0 to OCCP5) Output control registers (OCS1/OCS3/OCS5) Output control registers (OCS0/OCS2/OCS4) Initial value 00004BH 00004DH 00004FH 000051H 000053H 000055H 00000000B Initial value 00004AH 00004CH 00004EH 000050H 000052H 000054H 00000000B Initial value 000057H 000059H 00005BH ---00000B Initial values 000056H 000058H 00005AH 0000--00B 15 14 13 12 11 10 9 8 R/W R/W R/W R/W R/W R/W R/W R/W C14 C15 C13 C12 C11 C10 C09 C08 76 5 4 3 2 1 R/W R/W R/W R/W R/W R/W R/W R/W C06 C07 C05 C04 C03 C02 C01 C00 0 15 14 13 12 11 10 9 8 ⎯⎯ ⎯ R/W R/W R/W R/W R/W ⎯ ⎯⎯ CMOD OTE1 OTE0 OTD1 OTD0 76 5 4 3 2 1 0 R/W R/W R/W R/W ⎯⎯ R/W R/W ICP0 ICPIC ICE1 ICE0 ⎯⎯ CST1 CST0 |
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