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MB89930A Datasheet(PDF) 18 Page - Fujitsu Component Limited. |
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MB89930A Datasheet(HTML) 18 Page - Fujitsu Component Limited. |
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18 / 42 page  MB89930A Series 18 The RP indicates the address of the register bank currently in use. The relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and bits for control of CPU operations at the time of an interrupt. H-flag : Set to “1” when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared to “0” otherwise. This flag is for decimal adjustment instructions. I-flag : Interrupt is enabled when this flag is set to “1”. Interrupt is disabled when the flag is cleared to “0”. Cleared to “0” at the reset. IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is higher than the value indicated by this bit. IL1 IL0 Interrupt level High-low 00 1 High Low = no interrupt 01 10 2 11 3 N-flag : Set to “1” if the MSB becomes to “1” as the result of an arithmetic operation. Cleared to “0” when the bit is cleared to “0”. Z-flag : Set to “1” when an arithmetic operation results in 0. Cleared otherwise. V-flag : Set to “1” if the complement on 2 overflows as a result of an arithmetic operation. Cleared to “0” if the overflow does not occur. C-flag : Set to “1” when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared to “0” otherwise. Set to the shift-out value in the case of a shift instruction. "0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2 b1 RP Low OP codes b0 A7 A6 A5 A4 A3 A2 A1 A0 A15 Generated addresses A14 A13 A12 A11 A10 A9 A8 • Rule for Conversion of Actual Addresses of the General-purpose Register Area |
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