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LC87F1964A Datasheet(PDF) 4 Page - Sanyo Semicon Device |
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LC87F1964A Datasheet(HTML) 4 Page - Sanyo Semicon Device |
4 / 28 page LC87F1964A No.A0496-4/28 Subroutine Stack Levels : 2560 levels (the stack is allocated in RAM) High-speed Multiplication/Division Instructions • 16 bits × 8 bits (5 tCYC execution time) • 24 bits × 16 bits (12 tCYC execution time) • 16 bits ÷ 8 bits (8 tCYC execution time) • 24 bits ÷ 16 bits (12 tCYC execution time) Oscillation Circuits • RC oscillation circuit (internal): For system clock • CF oscillation circuit: For system clock, USB interface • Crystal oscillation circuit: For system clock, time-of-day clock • PLL circuit (internal): For USB interface (see Fig.5) Standby Function • HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation. 1) Oscillation is not halted automatically. 2) Canceled by a system reset or occurrence of an interrupt. • HOLD mode: Suspends instruction execution and the operation of the peripheral circuits. 1) The PLL base clock generator, CF, RC and crystal oscillators automatically stop operation. 2) There are four ways of resetting the HOLD mode. (1) Setting the reset pin to the lower level. (2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level (3) Having an interrupt source established at port 0 (4) Having an bus active interrupt source established in the USB host controller circuit • X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer. 1) The PLL base clock generator, CF and RC oscillator automatically stop operation. 2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained. 3) There are five ways of resetting the X'tal HOLD mode. (1) Setting the reset pin to the low level (2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5 pins to the specified level (3) Having an interrupt source established at port 0 (4) Having an interrupt source established in the base timer circuit (5) Having an bus active interrupt source established in the USB host controller circuit Package Form • SQFP48(7×7): Lead-free type • QIP48E(14×14): Lead-free type Development Tools • On-chip debugger: TCB87 type-B + LC87F1964A Flash ROM programming boards Package Programming boards QIP48E(14 ×14) W87F55256Q SQFP48(7 ×7) W87F55256SQ Recommended EPROM programmer Maker Model Supported version Device Flash Support Group, Inc. (Single) AF9708/AF9709/AF9709B (including product of Ando Electric Co.,Ltd) After Rev02.65 LC87F1964A SANYO SKK (SANYO FWS) Application Version: After 1.03 Chip Data Version: After 2.01 LC87F1964 |
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