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PCF2128 Datasheet(PDF) 4 Page - NXP Semiconductors |
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PCF2128 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 10 page PCF2128_SDS_0 © NXP B.V. 2007. All rights reserved. Preliminary [short] data sheet Rev. 00.03 — 4 June 2007 4 of 10 NXP Semiconductors PCF2128 Real time clock / calendar 6. Pinning information 6.1 Pinning Fig 2. Pin configuration SO20 Fig 3. SO20 (3d) PCF2128 SCL VDD SDI VBAT SDO VOUT SDA/CE INT IFS RST TS PFI CLKOUT PFO VSS TEST n.c. n.c. n.c. n.c. 001aag060 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 001aag576 die oscillator Table 3: Pin description PCF2128 Symbol Pin Description Symbol Pin Description SCL 1 combined serial clock input for both I2C and SPI interface. May float when CE inactive. VDD 20 positive supply voltage SDI 2 serial data input for SPI interface. May float when CE inactive. VBAT 19 battery backup supply voltage SDO 3 serial data output for SPI interface, push-pull VOUT 18 battery backed output voltage SDA / CE 4 combined serial data input / output for the I2C interface and chip enable input (active LOW) for the SPI interface. INT 17 interrupt output (open-drain; active LOW) IFS 5 interface selector input • connect to ground to select the SPI interface • connect to VOUT (pin 18) to select the I2C interface RST 16 reset output (open drain; active LOW) TS 6 timestamp input (active LOW) with 200 k Ω internal pull-up resistor PFI 15 power fail input CLKOUT 7 clock output (open drain) PFO 14 power fail output (open drain; active LOW) VSS 8 ground TEST 13 Do not connect and do not use as feed through. nc 9 Do not connect and do not use as feed through. nc 12 Do not connect and do not use as feed through. nc 10 Do not connect and do not use as feed through. nc 11 Do not connect and do not use as feed through. |
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