ICS85454AK-01LFT datasheet(7/15 Pages) ICST

Part #	ICS85454AK-01LFT

Description	DIFFERENTIAL-TO-LVDS MULTIPLEXER

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Manufacturer	ICST [Integrated Circuit Systems]

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7 / 15 page

85454AK-01

www.icst.com/products/hiperclocks.html

REV. B JUNE 16, 2006

7

Integrated

Circuit

Systems, Inc.

ICS85454-01

DUAL 2:1/1:2

DIFFERENTIAL-TO-LVDS MULTIPLEXER

APPLICATION INFORMATION

Figure 1 shows how the differential input can be wired to accept

single ended levels. The reference voltage V_REF = V

DD/2 is

generated by the bias resistors R1, R2 and C1. This bias circuit

FIGURE 1. SINGLE ENDED SIGNAL DRIVING DIFFERENTIAL INPUT

WIRING THE DIFFERENTIAL INPUT TO ACCEPT SINGLE ENDED LEVELS

should be located as close as possible to the input pin. The

ratio of R1 and R2 might need to be adjusted to position the

V_REF in the center of the input voltage swing.

V_REF

R1

1K

C1

0.1u

R2

1K

Single Ended Clock Input

IN

nIN

VDD

INPUTS:

IN/nIN INPUT:

For applications not requiring the use of the differential input,

both IN and nIN can be left floating. Though not required, but

for additional protection, a 1k

Ω resistor can be tied from IN to

ground.

LVCMOS CONTROL PINS:

All control pins have internal pull-ups or pull-downs; additional

resistance is not required but can be added for additional

protection. A 1k

Ω resistor can be used.

RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS

OUTPUTS:

LVDS

All unused LVDS output pairs can be either left floating or

terminated with 100

Ω across. If they are left floating, we

recommend that there is no trace attached.

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ICS85454AK-01LFT Datasheet(PDF) 7 Page - Integrated Circuit Systems

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