CYRF69103
Document #: 001-07611 Rev *B
Page 19 of 73
these four hidden blocks is used to store the protection table
for its eight Kbytes of user data.
The EraseAll function begins by erasing the user space of the
Flash macro with the highest address range. A bulk program
of all zeros is then performed on the same Flash macro, to
destroy all traces of the previous contents. The bulk program
is followed by a second erase that leaves the Flash macro in
a state ready for writing. The erase, program, erase sequence
is then performed on the next lowest Flash macro in the
address space if it exists. Following the erase of the user
space, the protection block for the Flash macro with the
highest address range is erased. Following the erase of the
protection block, zeros are written into every bit of the
protection table. The next lowest Flash macro in the address
space then has its protection block erased and filled with
zeros.
The end result of the EraseAll function is that all user data in
the Flash is destroyed and the Flash is left in an unpro-
grammed state, ready to accept one of the various write
commands. The protection bits for all user data are also reset
to the zero state.
The parameter block values that must be set, besides the
keys, are the CLOCK and DELAY values.
TableRead Function
The TableRead function gives the user access to part-specific
data stored in the Flash during manufacturing. It also returns
a Revision ID for the die (not to be confused with the Silicon
ID).
The table space for the CYRF69103 is simply a 64-byte row
broken up into eight tables of eight bytes. The tables are
numbered zero through seven. All user and hidden blocks in
the CYRF69103 consist of 64 bytes.
An internal table holds the Silicon ID and returns the Revision
ID. The Silicon ID is returned in SRAM, while the Revision ID
is returned in the CPU_A and CPU_X registers. The Silicon ID
is a value placed in the table by programming the Flash and is
controlled by Cypress Semiconductor Product Engineering.
The Revision ID is hard coded into the SROM. The Revision
ID is discussed in more detail later in this section.
An internal table holds alternate trim values for the device and
returns a one-byte internal revision counter. The internal
revision counter starts out with a value of zero and is incre-
mented each time one of the other revision numbers is not
incremented. It is reset to zero each time one of the other
revision numbers is incremented. The internal revision count
is returned in the CPU_A register. The CPU_X register will
always be set to FFh when trim values are read. The BLOCKID
value, in the parameter block, is used to indicate which table
should be returned to the user. Only the three least significant
bits of the BLOCKID parameter are used by the TableRead
function for the CYRF69103. The upper five bits are ignored.
When the function is called, it transfers bytes from the table to
SRAM addresses F8h–FFh.
The M8C’s A and X registers are used by the TableRead
function to return the die’s Revision ID. The Revision ID is a
16-bit value hard coded into the SROM that uniquely identifies
the die’s design.
Checksum Function
The Checksum function calculates a 16-bit checksum over a
user-specifiable number of blocks, within a single Flash macro
(Bank) starting from block zero. The BLOCKID parameter is
used to pass in the number of blocks to calculate the
checksum over. A BLOCKID value of 1 will calculate the
checksum of only block 0, while a BLOCKID value of 0 will
calculate the checksum of all 256-user blocks. The 16-bit
checksum is returned in KEY1 and KEY2. The parameter
KEY1 holds the lower eight bits of the checksum and the
parameter KEY2 holds the upper eight bits of the checksum.
The checksum algorithm executes the following sequence of
three instructions over the number of blocks times 64 to be
checksummed.
romx
add [KEY1], A
adc [KEY2], 0
Clocking
The CYRF69103 internal oscillator outputs two frequencies,
the Internal 24-MHz Oscillator and the 32-KHz Low-power
Oscillator.
The Internal 24-MHz Oscillator is designed such that it may be
trimmed to an output frequency of 24 MHz over temperature
and voltage variation. The Internal 24-MHz Oscillator accuracy
is 24 MHz –22% to +10% (between 0°–70°C). No external
components are required to achieve this level of accuracy.
Table 28.EraseAll Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value when SSC is
executed
CLOCK
0,FCh
Clock Divider used to set the write pulse
width
DELAY
0,FEh
For a CPU speed of 12 MHz set to 56h
Table 29.Table Read Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value when SSC is
executed
BLOCKID
0,FAh
Table number to read
Table 30.Checksum Parameters
Name
Address
Description
KEY1
0,F8h
3Ah
KEY2
0,F9h
Stack Pointer value when SSC is
executed
BLOCKID
0,FAh
Number of Flash blocks to calculate
checksum on
[+] Feedback
[+] Feedback
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
