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CY25403 Datasheet(PDF) 2 Page - Cypress Semiconductor

Part No. CY25403
Description  Three PLL Programmable Clock Generator with Spread Spectrum
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Maker  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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CY25403 Datasheet(HTML) 2 Page - Cypress Semiconductor

   
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PRELIMINARY
CY25403
CY25423
Document #: 001-12564 Rev. *A
Page 2 of 8
General Description
Th CY25403 and CY25423 are three PLL programmable
Spread Spectrum Clock Generators used to reduce EMI found
in high-speed digital electronic systems. Two of the three PLLs
have Spread Spectrum capability. The spread spectrum
feature are turned on or off using the control pin SSON.
The advantage of having three PLLs is that a single device can
generate up to three independent frequencies from a single
crystal or reference input frequency. Generally, a design
requires up to three oscillators to achieve the same result with
a single CY25403 or CY25423.
The device uses Cypress proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the input clock. By frequency modulating the
clock, the measured EMI at the fundamental and harmonic
frequencies are greatly reduced. This reduction in radiated
energy significantly reduces the cost of complying with
regulatory
agency
(EMC)
requirements
and
improves
time-to-market without degrading the system performance.
The CY25403 and CY25423 use a factory/field-programmable
configuration memory array to provide customization for
output frequencies, frequency select options, spread charac-
teristics like spread percentage and modulation frequency,
output drive strength and crystal load capacitance. A
customized device can be configured using CyberclocksTM
software or by contacting the factory.
The spread percentage is programmed to either center spread
or down spread with various spread percentages. The range
for center spread is from ±0.125% to ±2.50%. The range for
down spread is from –0.25% to –5.0%. Contact the factory for
smaller or larger spread percentage amounts, if required.
The input to the CY25403 and CY25423 is either a crystal or
a clock signal. The input frequency range for crystals is 8 MHz
to 48 MHz, and for clock signals is 8 MHz to 166 MHz.
The CY25403 and CY25423 have up to three clock outputs
and each output has four possible input sources.There are two
frequency select lines FS(1:0) that provide an option to select
four different sets of frequencies among the each of the three
PLLs. Each output has programmable output divider options.
Output 1 has eight possible divider values and outputs 2–3
have four possible divider values for maximum flexibility. The
2 bit or 3 bit output dividers are programmable providing a wide
output frequency range.
The outputs are glitch-free when frequency is switched using
output dividers. The outputs have a predictable phase
relationship, if the clock source is the same PLL and divider
values are 2, 3, 4, or 6.
The CY25403 and CY25423 are 3-PLL memory program-
mable spread spectrum clock generators with three clock
outputs.
Pin Configuration
8 LD SOIC
1
2
3
4
8
7
6
5
XOUT
GND
CLK3/SSON
PD#/OE/FS1
XIN
VDD
CLK1
CLK2/FS0
Pin Description - Memory Programmable 3-PLL device with 2 Spread Spectrum PLLs
Pin Number
Name
I/O
Description
1
XIN
Input
Crystal or Clock Input
2
VDD
Power
Power Supply
3
CLK1
Output
Programmable Clock Output
4
CLK2/FS0
Output/input
Programmable Clock Output or FS0
5
PD#/OE/FS1
Input
Power Down, Output Enable or FS1
6
CLK3/SSON
Output/Input
Programmable Clock Output or SSON
7
GND
Power
Power Supply Ground
8
XOUT
Output
Crystal Output
Table 1. Supply Voltage Options
Device
VDD Supply Voltage
CY25403
CY25423
2.5V, 3.0V or 3.3V
1.8V
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