PRELIMINARY
CY2546
Document #: 001-12563 Rev. *A
Page 5 of 11
CY2544
Absolute Maximum Conditions
Parameter
Description
Condition
Min.
Max.
Unit
VDD
Supply Voltage
for CY2544
–0.5
4.5
V
VDD_CORE
Supply Voltage
for CY2546
–0.5
2.6
V
VDD_CLK_BX
Supply Voltage for CY2544
–0.5
4.5
V
Supply Voltage for CY2546
–0.5
2.6
V
VIN
Input Voltage
Relative to VSS
–0.5
VDD + 0.5 VDC
TS
Temperature, Storage
Non Functional
–65
+150
°C
ESDHBM
ESD Protection (Human Body Model)
MIL-STD-883, Method 3015
2000
–
Volts
UL-94
Flammability Rating
@1/8 in.
V-0
MSL
Moisture Sensitivity Level
QFN package
3
Recommended Operating Conditions
Parameter
Description
Min.
Typ.
Max. Unit
VDD
VDD Operating
at 3.3V for CY2544
3.00
–
3.60
V
VDD
VDD Operating
at 3.0V for CY2544
2.70
–
3.30
V
VDD
VDD Operating
at 2.5V for CY2544
2.25
–
2.75
V
VDD_CORE
VDD_CORE Operating at 1.8V for CY2546
1.65
–
1.95
V
VDD_CLK_BX
Output Driver Voltage for Bank 1, 2 and 3 Operating at 3.3V (CY2544)
3.00
–
3.60
V
VDD_CLK_BX
Output Driver Voltage for Bank 1, 2 and 3 Operating at 3.0V (CY2544)
2.70
–
3.30
V
VDD_CLK_BX
Output Driver Voltage for Bank 1, 2 and 3 Operating at 2.5V (CY2544)
2.25
–
2.75
V
VDD_CLK_BX
Output Driver Voltage for Bank 1, 2 and 3 Operating at 1.8V (CY2546)
1.65
–
1.95
V
TAC
Commercial Ambient Temperature
0
–
+70
°C
TAI
Industrial Ambient Temperature
–40
–
+85
°C
CLOAD
Maximum Load Capacitance
–
–
15
pF
tPU
Power-up time for all VDD pins to reach minimum specified voltage (power ramps must
be monotonic)
0.05
–
500
ms
DC Electrical Specifications
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VOL
Output Low Voltage, All CLK pins
All VDD levels, IOL = 8 mA
–
–
0.4
V
VOH
Output High Voltage, All CLK pins
All VDD levels, IOH = –8 mA
VDD – 0.4
–
–
V
VIL
All Inputs except XIN
All VDD levels
–0.3
–
0.2 * VDD
V
VIH
All Inputs except XIN
All VDD levels
0.8 * VDD
–VDD + 0.3
V
VILX
Input Low Voltage, clock input to XIN pin
All VDD levels
–0.3
–
0.36
V
VIHX
Input High Voltage, clock input to XIN pin
All VDD levels
1.44
–
2.0
V
IILPDOE
Input Low Current, PD#/OE and FS0,1,2 pins VIN = VSS (No Internal pull up)
–
–
1
μA
IIHPDOE
Input High Current, PD#/OE and FS0,1,2 pins VIN = VDD (No Internal pull up)
–
–
1
μA
IILSR
Input Low Current, SSON pin
VIN = VSS
(Internal pull down = 160k typical)
––
1
μA
IIHSR
Input High Current, SSON pin
VIN = VDD
(Internal pull down = 160k typical)
––
25
μA
IDD
[1]
Supply Current
All clocks running, No load
–15
–
mA
IDDS
Standby Current
All output power down
–50
–
μA
CIN
Input Capacitance - All inputs except XIN
SSON, OE, PD# or FS inputs
––
7
pF
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