September 18, 2006
Document No. 001-05356 Rev. *B
10
CY8C20234, CY8C20334, CY8C20434 Final Data Sheet
1. Pin Information
1.1.4
48-Pin OCD Part Pinout
The 48-pin QFN part table and drawing below is for the CY8C20000 On-Chip Debug (OCD) PSoC device.
Note This part is only used for in-circuit debugging. It is NOT available for production
Table 1-4. 48-Pin OCD Part Pinout (QFN**)
Pin
No.
Name
Description
CY8C20000 OCD PSoC Device
1
NC
No connection.
2
IO
I
P0[1]
3
IO
IP2[7]
4
IO
IP2[5]
5
IO
I
P2[3]
6
IO
I
P2[1]
7
IO
IP3[3]
8
IO
I
P3[1]
9
IOH
I
P1[7]
I2C SCL, SPI SS.
10
IOH
I
P1[5]
I2C SDA, SPI MISO.
11
NC
No connection.
12
NC
No connection.
13
NC
No connection.
14
NC
No connection.
15
IOH
I
P1[3]
SPI CLK.
16
IOH
I
P1[1]
CLK*, I2C SCL, SPI MOSI.
17
Power
Vss
Ground connection.
18
CCLK
OCD CPU clock output.
19
HCLK
OCD high speed clock output.
20
IOH
I
P1[0]
DATA*, I2C SDA.
21
IOH
I
P1[2]
22
NC
No connection.
23
NC
No connection.
Not for Production
24
NC
No connection.
25
IOH
I
P1[4]
Optional external clock input (EXTCLK).
26
IOH
I
P1[6]
27
Input
XRES
Active high external reset with internal
pull down.
28
IO
IP3[0]
29
IO
IP3[2]
30
IO
IP2[0]
31
IO
I
P2[2]
32
IO
I
P2[4]
Pin
No.
Name
Description
33
IO
I
P2[6]
41
Power
Vdd
Supply voltage.
34
IO
I
P0[0]
42
OCDO
OCD even data IO.
35
IO
I
P0[2]
43
OCDE
OCD odd data output.
36
IO
I
P0[4]
44
IO
I
P0[7]
37
NC
No connection.
45
IO
I
P0[5]
38
NC
No connection.
46
IO
I
P0[3]
Integrating input.
39
NC
No connection.
47
Power
Vss
Ground connection.
40
IO
I
P0[6]
Analog bypass.
48
NC
No connection.
CP
Power
Vss
Center pad must be connected to ground.
LEGEND A = Analog, I = Input, O = Output, NC = No Connection H = 5 mA High Output Drive.
* ISSP pin which is not HighZ at POR. See the PSoC Mixed-Signal Array Technical Reference Manual for details.
** The center pad on the QFN package should be connected to ground (Vss) for best mechanical, thermal, and electrical performance. If not connected to ground, it
should be electrically floated and not connected to any other signal.
OCD QFN
(Top V ie w )
10
11
12
NC
AI,P0[1]
AI,P2[7]
AI,P2[5]
AI,P2[3]
AI,P2[1]
AI,P3[3]
AI,P3[1]
AI, I2C SCL, SPI SS, P1[7]
AI, I2C SDA, SPI M ISO, P1[5]
NC
NC
35
34
33
32
31
30
29
28
27
26
25
36
P0[2],AI
P0[0],AI
P2[6],AI
P2[4],AI
P2[2],AI
P2[0],AI
P3[2],AI
P3[0],AI
XRES
P1[6],AI
P1[4],EXT CLK,AI
P0[4],AI
1
2
3
4
5
6
7
8
9
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