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CY7C1447AV33-133BGXC Datasheet(PDF) 11 Page - Cypress Semiconductor

Part # CY7C1447AV33-133BGXC
Description  36-Mbit (1M x 36/2M x 18/512K x 72) Flow-Through SRAM
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1447AV33-133BGXC Datasheet(HTML) 11 Page - Cypress Semiconductor

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CY7C1441AV33
CY7C1443AV33
CY7C1447AV33
Document #: 38-05357 Rev. *F
Page 11 of 31
Partial Truth Table for Read/Write[2, 7]
Function (CY7C1441AV33)
GW
BWE
BWD
BWC
BWB
BWA
Read
H
H
X
X
X
X
Read
H
L
HH
HH
Write Byte A (DQA, DQPA)H
L
H
H
H
L
Write Byte B(DQB, DQPB)H
L
H
H
L
H
Write Bytes A, B (DQA, DQB, DQPA, DQPB)H
L
H
H
L
L
Write Byte C (DQC, DQPC)
H
LHLH
H
Write Bytes C, A (DQC, DQA, DQPC, DQPA)
H
LHLH
L
Write Bytes C, B (DQC, DQB, DQPC, DQPB)H
L
H
L
L
H
Write Bytes C, B, A (DQC, DQB, DQA, DQPC,
DQPB, DQPA)
HLHL
L
L
Write Byte D (DQD, DQPD)H
L
L
H
H
H
Write Bytes D, A (DQD, DQA, DQPD, DQPA)H
L
L
H
H
L
Write Bytes D, B (DQD, DQA, DQPD, DQPA)H
L
L
H
L
H
Write Bytes D, B, A (DQD, DQB, DQA, DQPD,
DQPB, DQPA)
HL
L
H
L
L
Write Bytes D, B (DQD, DQB, DQPD, DQPB)H
L
L
L
H
H
Write Bytes D, B, A (DQD, DQC, DQA, DQPD,
DQPC, DQPA)
HL
L
L
H
L
Write Bytes D, C, A (DQD, DQB, DQA, DQPD,
DQPB, DQPA)
H
L
LLL
H
Write All Bytes
H
L
LLLL
Write All Bytes
L
X
X
X
X
X
Truth Table for Read/Write[2]
Function (CY7C1443AV33)
GW
BWE
BWB
BWA
Read
H
H
X
X
Read
H
L
H
H
Write Byte A - (DQA and DQPA)H
L
H
L
Write Byte B - (DQB and DQPB)H
L
L
H
Write All Bytes
H
L
L
L
Write All Bytes
L
X
X
X
Truth Table for Read/Write[2, 8]
Function (CY7C1447AV33)
GW
BWE
BWX
Read
H
H
X
Read
H
L
All BW = H
Write Byte x – (DQx and DQPx)H
L
L
Write All Bytes
H
L
All BW = L
Write All Bytes
L
X
X
Notes:
7. Table only lists a partial listing of the byte write combinations. Any Combination of BWX is valid Appropriate write will be done based on which byte write is active.
8. BWx represents any byte write signal BW[A..H].To enable any byte write BWx, a Logic LOW signal should be applied at clock rise.Any number of bye writes can
be enabled at the same time for any given write.
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