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IDT49FCT3805DPYGI Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT49FCT3805DPYGI Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 7 page 1 IDT49FCT3805D/E 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER INDUSTRIALTEMPERATURERANGE SEPTEMBER 2004 2004 Integrated Device Technology, Inc. DSC-5864/19 c IDT49FCT3805D/E INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS DUAL 1-TO-5 CLOCK DRIVER FUNCTIONAL BLOCK DIAGRAM 5 OA1 - O A5 OB 1 - O B 5 OE A IN A OE B IN B MON 5 PIN CONFIGURATION OA1 OA3 OA4 GNDQ INA VCCA OA2 GNDA OA5 OEA 1 2 3 4 5 6 7 8 9 OB3 OB4 MON INB VCCB OB1 OB2 GNDB OB5 OEB 11 12 13 14 15 16 17 18 19 20 10 SSOP/ QSOP TOP VIEW FEATURES: • Advanced CMOS Technology • Guaranteed low skew < 200ps (max.) • Very low propagation delay < 2.5ns (max) • Very low duty cycle distortion < 270ps (max) • Very low CMOS power levels • Operating frequency up to 166MHz • TTL compatible inputs and outputs • Inputs can be driven from 3.3V or 5V components • Two independent output banks with 3-state control • 1:5 fanout per bank • "Heartbeat" monitor output •VCC = 3.3V ± 0.3V • Available in SSOP and QSOP packages The IDT logo is a registered trademark of Integrated Device Technology, Inc. DESCRIPTION: The FCT3805 is a 3.3 volt clock driver built using advanced CMOS technology. The device consists of two banks of drivers, each with a 1:5 fanout and its own output enable control. The device has a "heartbeat" monitor for diagnostics and PLL driving. The MON output is identical to all other outputs andcomplieswiththeoutputspecificationsinthisdocument. TheFCT3805offers low capacitance inputs. The FCT3805 is designed for high speed clock distribution where signal quality and skew are critical. The FCT3805 also allows single point-to-point transmissionlinedrivinginapplicationssuchasaddressdistribution,whereone signal must be distributed to multiple recievers with low skew and high signal quality. For more information on using the FCT3805 with two different input frequencies on bank A and B, please see AN-236. |
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