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IDT77V1253L25PGI Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT77V1253L25PGI Datasheet(HTML) 7 Page - Integrated Device Technology |
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7 / 44 page  7 TRIPLE PORT PHY (PHYSICAL LAYER) FOR 25.6 AND 51.2 MBPS ATM NETWORKS IDT77V1253 SIGNAL NAME PIN NUMBER 16-BIT UTOPIA 2 8-BIT UTOPIA 1 DPI TXDATA13 30 TXDATA13 see note 2 see note 2 TXDATA14 31 TXDATA14 see note 2 see note 2 TXDATA15 32 TXDATA15 see note 2 see note 2 TXPARITY 33 TXPARITY TXPARITY P2_TFRM TXEN 34 TXEN TXEN[0] P1_TFRM TXSOC 35 TXSOC TXSOC P0_TFRM TXADDR4 36 TXADDR4 see note 2 see note 2 TXADDR3 37 TXADDR3 see note 2 see note 2 VDD 38 TXADDR2 39 TXADDR2 see note 1 P2_TCLK TXADDR1 40 TXADDR1 TXCLAV[2] P1_TCLK TXADDR0 41 TXADDR0 TXCLAV[1] P0_TCLK TXCLAV 42 TXCLAV TXCLAV[0] see note 1 TXCLK 43 TXCLK TXCLK DPICLK GND 44 VDD 45 RXCLK 46 RXCLK RXCLK see note 2 RXEN 47 RXEN RXEN[0] see note 2 RXADDR0 48 RXADDR0 RXEN[1] P0_RCLK RXADDR1 49 RXADDR1 RXEN[2] P1_RCLK GND 50 RXADDR2 51 RXADDR2 see note 2 P2_RCLK RXADDR3 52 RXADDR3 see note 2 see note 2 RXADDR4 53 RXADDR4 see note 2 see note 2 RXCLAV 54 RXCLAV RXCLAV[0] P1_RFRM RXSOC 55 RXSOC RXSOC P0_FRM GND 56 VDD 57 RXPARITY 58 RXPARITY RXPARITY P2_RFRM RXDATA15 59 RXDATA15 see note 1 see note 1 RXDATA14 60 RXDATA14 see note 1 see note 1 RXDATA13 61 RXDATA13 see note 1 see note 1 RXDATA12 62 RXDATA12 see note 1 see note 1 RXDATA11 63 RXDATA11 see note 1 P2_RD[3] RXDATA10 64 RXDATA10 RXCLAV[3] P2_RD[2] RXDATA9 65 RXDATA9 RXCLAV[2] P2_RD[1] RXDATA8 66 RXDATA8 RXCLAV[1] P2_RD[0] GND 67 VDD 68 RXDATA7 69 RXDATA7 RXDATA7 P1_RD[3] RXDATA6 70 RXDATA6 RXDATA6 P1_RD[2] RXDATA5 71 RXDATA5 RXDATA5 P1_RD[1] RXDATA4 72 RXDATA4 RXDATA4 P1_RD[0] RXDATA3 73 RXDATA3 RXDATA3 P0_RD[3] RXDATA2 74 RXDATA2 RXDATA2 P0_RD[2] RXDATA1 75 RXDATA1 RXDATA1 P0_RD[1] 4781 tbl 06 TABLE 2 — SIGNAL ASSIGNMENT AS A FUNCTION OF PHY/ATM INTERFACE MODE (CONTINUED): |
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