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P4C170-35FSC Datasheet(PDF) 7 Page - Pyramid Semiconductor Corporation |
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P4C170-35FSC Datasheet(HTML) 7 Page - Pyramid Semiconductor Corporation |
7 / 15 page P4C168, P4C169, P4C170 Page 7 of 15 Document # SRAM107 REV A * including scope and test fixture. Note: Because of the ultra-high speed of the P4C168, P4C169 AND P4C170 care must be taken when testing these devices; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high- inductance leads that cause supply bounce must be avoided by bringing the V CC and ground planes directly up to the contactor fingers. A high frequency capacitor of 0.01 µF is also required between V CC and ground. Figure 1. Output Load Figure 2. Thevenin Equivalent Input Pulse Levels GND to 3.0V Input Rise and Fall Times 3ns Input Timing Reference Level 1.5V Output Timing Reference Level 1.5V Output Load See Figures 1 and 2 AC TEST CONDITIONS To avoid signal reflections, proper termination must be used; for example, a 50 Ω test environment should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at the comparator input, and a 116 Ω resistor must be used in series with D OUT to match 166Ω (Thevenin Resistance). LCC PIN CONFIGURATION LCC (L9) |
Similar Part No. - P4C170-35FSC |
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