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IDT82V2048S Datasheet(PDF) 1 Page - Integrated Device Technology

Part No. IDT82V2048S
Description  OCTAL T1/E1 SHORT HAUL LINE INTERFACE UNIT WITH SINGLE ENDED OPTION
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Maker  IDT [Integrated Device Technology]
Homepage  http://www.idt.com
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IDT82V2048S Datasheet(HTML) 1 Page - Integrated Device Technology

 
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 2005 Integrated Device Technology, Inc.
DSC-6969/-
IDT and the IDT logo are trademarks of Integrated Device Technology, Inc.
1
September 2005
OCTAL T1/E1 SHORT HAUL LINE
INTERFACE UNIT WITH SINGLE
ENDED OPTION
IDT82V2048S
FUNCTIONAL BLOCK DIAGRAM
Figure-1 Block Diagram
Jitter
Attenuator
Jitter
Attenuator
B8ZS/
HDB3/AMI
Decoder
B8ZS/
HDB3/AMI
Encoder
Remote
Loopback
Analog
Loopback
Slicer
Peak
Detector
CLK&Data
Recovery
(DPLL)
Line
Driver
Waveform
Shaper
IBLC
Detector
LOS
Detector
IBLC
Generator
Digital
Loopback
AIS
Detector
One of Eight Identical Channels
Register
File
Control Interface
Clock
Generator
JTAG TAP
RTIPn
RRINGn
TTIPn
TRINGn
VDDIO
VDDT
VDDD
VDDA
LOSn
RCLKn
RDn/RDPn
CVn/RDNn
TCLKn
BPVIn/TDNn
TDn/TDPn
G.772
Monitor
Transmit
All Ones
FEATURES
!
Fully integrated octal T1/E1 short haul line interface which
supports 100
Ω T1 twisted pair, 120 Ω E1 twisted pair and 75 Ω
E1 coaxial applications
!
Optional Single Ended receive termination LIU on RTIPn/
RRINGn for 75
Ω E1 coaxial applications
!
Selectable Single Rail mode or Dual Rail mode and AMI or
B8ZS/HDB3 encoder/decoder
!
Built-in transmit pre-equalization meets G.703 & T1.102
!
Selectable transmit/receive jitter attenuator meets ETSI CTR12/
13, ITU G.736, G.742, G.823 and AT&T Pub 62411 specifications
!
SONET/SDH optimized jitter attenuator meets ITU G.783
mapping jitter specification
!
Digital/Analog LOS detector meets ITU G.775, ETS 300 233 and
T1.231
!
ITU G.772 non-intrusive monitoring for in-service testing for
any one of channel 1 to channel 7
!
Low impedance transmit drivers with high-Z
!
Selectable hardware and parallel/serial host interface
!
Local, Remote and Inband Loopback test functions
!
Hitless Protection Switching (HPS) for 1 to 1 protection without
relays
!
JTAG boundary scan for board test
!
3.3 V supply with 5 V tolerant I/O
!
Low power consumption
!
Operating temperature range: -40°C to +85°C
!
Available in 144-pin Thin Quad Flat Pack (TQFP) and 160-pin
Plastic Ball Grid Array (PBGA) packages


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