 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
IDT82V3288 Datasheet(PDF) 4 Page - Integrated Device Technology |
|
||||||||||||||||||||||||||||||
IDT82V3288 Datasheet(HTML) 4 Page - Integrated Device Technology |
|
|
4 / 170 page  Table of Contents 4 June 22, 2006 IDT82V3288 WAN PLL 3.10.1.3.1 Temp-Holdover Mode .................................................................................................................................... 35 3.10.1.4 Lost-Phase Mode ............................................................................................................................................................. 35 3.10.1.5 Holdover Mode ................................................................................................................................................................. 35 3.10.1.5.1 Automatic Instantaneous ............................................................................................................................... 36 3.10.1.5.2 Automatic Slow Averaged ............................................................................................................................. 36 3.10.1.5.3 Automatic Fast Averaged .............................................................................................................................. 36 3.10.1.5.4 Manual ........................................................................................................................................................... 36 3.10.1.5.5 Holdover Frequency Offset Read .................................................................................................................. 36 3.10.1.6 Pre-Locked2 Mode ........................................................................................................................................................... 36 3.10.2 T4 DPLL Operating Mode .............................................................................................................................................................. 36 3.10.2.1 Free-Run Mode ................................................................................................................................................................ 36 3.10.2.2 Locked Mode .................................................................................................................................................................... 36 3.10.2.3 Holdover Mode ................................................................................................................................................................. 36 3.11 T0 / T4 DPLL OUTPUT ................................................................................................................................................................................. 38 3.11.1 PFD Output Limit ............................................................................................................................................................................ 38 3.11.2 Frequency Offset Limit .................................................................................................................................................................. 38 3.11.3 PBO (T0 only) ................................................................................................................................................................................. 38 3.11.4 Phase Offset Selection (T0 only) .................................................................................................................................................. 38 3.11.5 Four Paths of T0 / T4 DPLL Outputs ............................................................................................................................................. 38 3.11.5.1 T0 Path ............................................................................................................................................................................. 38 3.11.5.2 T4 Path ............................................................................................................................................................................. 39 3.12 T0 / T4 APLL ................................................................................................................................................................................................. 40 3.13 OUTPUT CLOCKS & FRAME SYNC SIGNALS ........................................................................................................................................... 40 3.13.1 Output Clocks ................................................................................................................................................................................. 40 3.13.2 Frame SYNC Output Signals ......................................................................................................................................................... 43 3.14 MASTER / SLAVE CONFIGURATION ......................................................................................................................................................... 45 3.15 INTERRUPT SUMMARY ............................................................................................................................................................................... 46 3.16 T0 AND T4 SUMMARY ................................................................................................................................................................................. 46 3.17 POWER SUPPLY FILTERING TECHNIQUES ............................................................................................................................................. 47 4 TYPICAL APPLICATION ................................................................................................................................................. 48 4.1 MASTER / SLAVE APPLICATION ............................................................................................................................................................... 48 4.2 LINE CARD APPLICATION .......................................................................................................................................................................... 49 5 MICROPROCESSOR INTERFACE .................................................................................................................................. 50 5.1 EPROM MODE .............................................................................................................................................................................................. 51 5.2 MULTIPLEXED MODE .................................................................................................................................................................................. 52 5.3 INTEL MODE ................................................................................................................................................................................................. 54 5.4 MOTOROLA MODE ...................................................................................................................................................................................... 56 5.5 SERIAL MODE .............................................................................................................................................................................................. 58 6 JTAG ................................................................................................................................................................................ 60 7 PROGRAMMING INFORMATION .................................................................................................................................... 61 7.1 REGISTER MAP ............................................................................................................................................................................................ 61 7.2 REGISTER DESCRIPTION ........................................................................................................................................................................... 67 7.2.1 Global Control Registers ............................................................................................................................................................... 67 7.2.2 Interrupt Registers ......................................................................................................................................................................... 76 7.2.3 Input Clock Frequency & Priority Configuration Registers ....................................................................................................... 81 7.2.4 Input Clock Quality Monitoring Configuration & Status Registers ......................................................................................... 104 7.2.5 T0 / T4 DPLL Input Clock Selection Registers ........................................................................................................................... 118 7.2.6 T0 / T4 DPLL State Machine Control Registers ......................................................................................................................... 122 7.2.7 T0 / T4 DPLL & APLL Configuration Registers .......................................................................................................................... 124 7.2.8 Output Configuration Registers .................................................................................................................................................. 138 7.2.9 PBO & Phase Offset Control Registers ...................................................................................................................................... 148 7.2.10 Synchronization Configuration Registers ................................................................................................................................. 150 8 THERMAL MANAGEMENT ........................................................................................................................................... 152 |
Similar Part No. - IDT82V3288 |
|
Similar Description - IDT82V3288 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
