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PCA9534ADWRG4 Datasheet(PDF) 6 Page - Texas Instruments |
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PCA9534ADWRG4 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 35 page www.ti.com Device Address 0 1 1 1 A1 A2 A0 Slave Address R/W Fixed Hardware Selectable Control Register and Command Byte 0 0 0 0 B1 B0 0 0 PCA9534A REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS SCPS141B – SEPTEMBER 2006 – REVISED MARCH 2007 Interface Definition BIT BYTE 7 (MSB) 6 5 4 3 2 1 0 (LSB) I2C slave address L H H H A2 A1 A0 R/W Px I/O data bus P7 P6 P5 P4 P3 P2 P1 P0 Figure 4 shows the address byte of the PCA9534A. Figure 4. PCA9534A Address Address Reference INPUTS I2C BUS SLAVE ADDRESS A2 A1 A0 L L L 56 (decimal), 38 (hexadecimal) L L H 57 (decimal), 39 (hexadecimal) L H L 58 (decimal), 3A (hexadecimal) L H H 59 (decimal), 3B (hexadecimal) H L L 60 (decimal), 3C (hexadecimal) H L H 61 (decimal), 3D (hexadecimal) H H L 62 (decimal), 3E (hexadecimal) H H H 63 (decimal), 3F (hexadecimal) The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read is selected, while a low (0) selects a write operation. Following the successful acknowledgment of the address byte, the bus master sends a command byte which is stored in the control register in the PCA9534A. Two bits of this command byte state the operation (read or write) and the internal register (input, output, polarity inversion or configuration) that will be affected. This register can be written or read through the I2C bus. The command byte is sent only during a write transmission. Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a new command byte has been sent. Figure 5. Control Register Bits 6 Submit Documentation Feedback |
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