P4C174

Page 4 of 12

Document # SRAM118 REV C

Symbol

t

RC

t

AA

t

OH

t

AC

t

LZ

t

HZ

t

OE

t

OLZ

Read Cycle Time

Address Access

Time

Address Change to

Output Change

Chip Enable LOW to

Output Valid

Chip Enable LOW

Chip Enable HIGH

Output Enable LOW

to Output Valid

Output Enable LOW

Min

–8

Unit

ns

ns

ns

ns

ns

ns

ns

ns

–15

–20

–10

–12

–25

Max

Min

Max

Min

Max

Min

Max

Min

Max

Min

Max

8

3

3

0

AC CHARACTERISTICS—READ CYCLE

(V

(2)

t

OHZ

Output Enable HIGH

t

PU

Chip Enable LOW or

Address Change to

Powerup

t

pUPD

Powerup to

Powerdown

Note:

1. Transition is measured ± 200 mV from steady state voltage with Output Load B.

0

8

8

5

5

5

20

10

3

3

0

0

10

10

5

6

5

20

12

3

3

0

0

12

12

5

6

5

20

15

3

3

0

0

15

15

8

8

5

20

20

3

3

0

0

20

20

8

10

8

20

25

3

3

0

0

25

25

10

12

10

25

ns

ns

ns

Parameter

READ CYCLE NO. 1 (OE

OE

OE

OE