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P4C1048L-45PC Datasheet(PDF) 1 Page - Pyramid Semiconductor Corporation

Part # P4C1048L-45PC
Description  LOW POWER 512K x 8 CMOS STATIC RAM
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Manufacturer  PYRAMID [Pyramid Semiconductor Corporation]
Direct Link  http://www.pyramidsemiconductor.com
Logo PYRAMID - Pyramid Semiconductor Corporation

P4C1048L-45PC Datasheet(HTML) 1 Page - Pyramid Semiconductor Corporation

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Document # SRAM129 REV D
Revised July 2007
P4C1048L
LOW POWER 512K x 8
CMOS STATIC RAM
locations are specified on address pins A
0 to A18. Read-
ing is accomplished by device selection (
CE low) and
output enabling (
OE) while write enable (WE) remains
HIGH. By presenting the address under these condi-
tions, the data in the addressed memory location is pre-
sented on the data input/output pins. The input/output
pins stay in the HIGH Z state when either
CE is HIGH or
WE is LOW.
The P4C1048L is packaged in a 32-pin 445 mil plastic
SOP, 32-pin TSOP II, or 600 mil plastic or ceramic side-
brazed DIP.
The P4C1048L is a 4 Megabit low power CMOS static
RAM organized as 512K x 8. The CMOS memory re-
quires no clocks or refreshing, and has equal access
and cycle times. Inputs are fully TTL-compatible. The
RAM operates from a single 5V±10% tolerance power
supply.
Access times as fast as 45 ns are availale. CMOS is
utilized to reduce power consumption to a low level.
The P4C1048L device provides asynchronous opera-
tion with matching access and cycle times. Memory
Common Data I/O
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Advanced CMOS Technology
Automatic Power Down
Packages
—32-Pin 600 mil Plastic and Ceramic DIP
—32-Pin 445 mil SOP
—32-Pin TSOP II
V
CC Current
— Operating: 35mA
— CMOS Standby: 100µA
Access Times
—45/55/70/100 ns
Single 5 Volts ±10% Power Supply
Easy Memory Expansion Using
CE
CE
CE
CE
CE and OE
OE
OE
OE
OE
Inputs
DESCRIPTION
FEATURES
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
DIP (P600, C10),
SOP (S12), TSOP II (T4)
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