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STAC9202 Datasheet(PDF) 27 Page - Integrated Device Technology |
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STAC9202 Datasheet(HTML) 27 Page - Integrated Device Technology |
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27 / 135 page  STAC9202 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES PC AUDIO IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC WITH DUAL DIGITAL MICROPHONE INTERFACES 27 STAC9202 V 1.1 102606 IDT CONFIDENTIAL 5.4.8. AFG GPIOCap Table 23. AFG PwrCap Command Response Format Bit Bitfield Name RW Reset Description [31:4] Rsvd R 0x0 Reserved [3] D3 R 0x1 Power State D3 is supported. Allows for lowest possible power consuming state under software control (and still properly respond to a subsequent Power State command). [2] D2 R 0x1 Power State D2 is supported. Allows for lowest possible power consuming state from which it can return to fully on state within 10 ms. [1] D1 R 0x1 Power State D1 is supported. Allows for lowest possible power consuming state from which it can return to fully on state within 10 ms, excepting analog pass-through circuits which must remain fully on. [0] D0 R 0x1 Power State D0 is supported. Node power state is fully on. Table 24. AFG GPIOCap Command Verb Format Verb ID Payload Response Get F00 11 See bitfield table |
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