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STAC9200X5NAE Datasheet(PDF) 46 Page - Integrated Device Technology |
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STAC9200X5NAE Datasheet(HTML) 46 Page - Integrated Device Technology |
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46 / 126 page  STAC9200/9200D 2-CHANNEL HIGH DEFINITION AUDIO CODEC PC AUDIO IDT™ 2-CHANNEL HIGH DEFINITION AUDIO CODEC 46 STAC9200/9200D V 1.4 12/06 IDT CONFIDENTIAL 5.6.6. ADC0Cnvtr PwrState Table 63. ADC0Cnvtr ProcState Command Response Format Bit Bitfield Name RW Reset Description [31.:8] Rsvd2 R 0x0 Reserved [7] HPFOffsetDis RW 0x0 High Pass Filter Offset Calculation Disable 0 = Calculation enabled. 1 = Calculation disabled. [6.:2] Rsvd1 R 0x0 Reserved [1.:0] HPFByp RW 0x1 Processing State = 00 (OFF): bypass the ADC high pass filter; Processing State = 01, 10, 11 (ON or BENIGN): ADC high pass filter is enabled. Table 64. ADC0Cnvtr PwrState Command Verb Format Verb ID Payload Response Get F05 00 See bitfield table Set1 705 See bits [7:0] of bitfield table 0000_0000h Table 65. ADC0Cnvtr PwrState Command Response Format Bit Bitfield Name RW Reset Description [31.:8] Rsvd2 R 0x0 Reserved [7.:4] Act R 0x3 PS-Act: Actual power state of referenced node. [3.:2] Rsvd1 R 0x0 Reserved [1.:0] Set RW 0x3 PS-Set: Current power setting of referenced node. 00 - Fully on. 01 - Fully on. 10 - Fully on. 11 - Powered down (default powered down) |
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