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ICS557G-06LFT Datasheet(PDF) 1 Page - Integrated Device Technology |
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ICS557G-06LFT Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 11 page DATASHEET 1 TO 4 HCSL CLOCK BUFFER ICS557-06 IDT™ / ICS™ 1 TO 4 HCSL CLOCK BUFFER 1 ICS557-06 REV F 090407 Description The ICS557-06 is a one to four differential clock buffer designed for use in PCI-Express applications. The device selects one of the two differential HCSL or LVDS input pairs and fans out to four pairs of differential HCSL or LVDS outputs. Features • Packaged in 20-pin TSSOP • Available in Pb (lead) free package • Operating voltage of 3.3 V • Low power consumption • Input differential clock of up to 200 MHz for HCSL and up to 100 MHz for LVDS • Jitter 60 ps (cycle-to-cycle) • Output-to-output skew of 50 ps • Available in industrial temperature range (-40 to +85°C) Block Diagram VDD CLKA CLKA Rr (IREF) CLKB CLKB CLKC CLKC CLKD CLKD SEL GND IN1 IN1 IN2 IN2 MUX 2 to 1 OE 2 2 PD |
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