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P3C1011 Datasheet(PDF) 7 Page - Pyramid Semiconductor Corporation

Part No. P3C1011
Description  HIGH SPEED 128K x 16 (2 MEG) STATIC CMOS RAM
Download  10 Pages
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Maker  PYRAMID [Pyramid Semiconductor Corporation]
Homepage  http://www.pyramidsemiconductor.com
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P3C1011 Datasheet(HTML) 7 Page - Pyramid Semiconductor Corporation

 
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P3C1011
Page 7 of 10
Document # SRAM131 REV OR
Input Pulse Levels
V
SS to 3.0V
Input Rise and Fall Times
3ns
Input Timing Reference Level
1.5V
Output Timing Reference Level
1.5V
Output Load
See Figures 1 and 2
AC TEST CONDITIONS
Figure 1. Output Load
Figure 2. Thevenin Equivalent
* including scope and test fixture.
Note:
Because of the ultra-high speed of the P3C1041, care must be taken
when testing this device; an inadequate setup can cause a normal
functioning part to be rejected as faulty. Long high-inductance leads
that cause supply bounce must be avoided by bringing the V
CC and
ground planes directly up to the contactor fingers. A 0.01 µF high
frequency capacitor is also required between V
CC and ground. To avoid
signal reflections, proper termination must be used; for example, a 50
test environment should be terminated into a 50
Ω load with 1.73V
(Thevenin Voltage) at the comparator input, and a 116
Ω resistor must
be used in series with D
OUT to match 166Ω (Thevenin Resistance).
Active
TRUTH TABLE
Standby
Power
I/O
0 - I/O7
WE
WE
WE
WE
WE
OE
OE
OE
OE
OE
CE
CE
CE
CE
CE
D
OUT
D
OUT
High Z
D
IN
X
H
H
H
L
X
L
L
L
X
H
L
L
L
Active
Active
Active
High Z
L
BHE
BHE
BHE
BHE
BHE
BLE
BLE
BLE
BLE
BLE
X
L
H
L
L
X
L
L
H
L
I/O
8 - I/O15
D
OUT
High Z
D
OUT
D
IN
High Z
Read Upper Bits Only
Power-down
Mode
Read All Bits
Read Lower Bits Only
Write All Bits
D
IN
L
X
L
Active
H
L
High Z
Write Lower Bits Only
High Z
L
X
L
Active
L
HD
IN
Write Upper Bits Only
High Z
H
H
L
Active
X
X
High Z
Selected, Outputs Disabled


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